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[PATCH] x86: fix AVX* dependencies of ".arch .nosse*"
- From: Jan Beulich <jbeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Thu, 13 Feb 2020 10:23:12 +0100
- Subject: [PATCH] x86: fix AVX* dependencies of ".arch .nosse*"
Since ".arch .avx*" enables SSE*, disabling SSE* should also disable
AVX*. Together with 7deea9aad866 ('x86: fix SSE4a dependencies of
".arch .nosse*"') I think this makes clear that the whole .arch logic
needs an overhaul, such that the mechanism to enable features implies
the reverse operation when disabling any, without having to modify two
places. Arm64's approach may be worthwhile to consider cloning.
Note that while commit 1848e567343e ("Update x86 CPU_XXX_FLAGS
handling") introducing the testcase which needs fixing here explicitly
says "Don't disable AVX nor AVX512 when disabling SSE", I don't see why
this would be. Furthermore it also says "Don't disable AVX512 when
disabling AVX", which too has been undone meanwhile (commit 89199bb5a027
["ix86: Disable AVX512F when disabling AVX2"], PR gas/24359). The only
sensible (consistent) alternative therefore would be to avoid enabling
SSE* with ".arch .avx*", like is done for SSE* wrt MMX (in turn leading
to inconsistencies with SSE insns accessing MMX registers).
gas/
2020-02-XX Jan Beulich <jbeulich@suse.com>
* gas/testsuite/gas/i386/i386.exp: Convert nosse-5 from dump to
list test.
* gas/testsuite/gas/i386/nosse-5.s: Adjust comment. Reset arch to
generic32 before enabling AVX512VL. Force alignment.
* gas/testsuite/gas/i386/nosse-5.d: Delete.
* gas/testsuite/gas/i386/nosse-5.l: New.
opcodes/
2020-02-XX Jan Beulich <jbeulich@suse.com>
* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX_FLAGS to
CPU_ANY_SSE4_2_FLAGS entry.
* i386-init.h: Re-generate.
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -195,7 +195,7 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_list_test "nosse-2" "-march=core+nosse -al"
run_list_test "nosse-3" "-march=+nosse -al"
run_list_test "nosse-4" "-al"
- run_dump_test "nosse-5"
+ run_list_test "nosse-5" "-al"
run_list_test "noavx-1" "-al"
run_list_test "noavx-2" "-march=+noavx -al"
run_list_test "noavx-3" "-al"
--- a/gas/testsuite/gas/i386/nosse-5.d
+++ /dev/null
@@ -1,24 +0,0 @@
-#objdump: -drw
-#name: i386 .nosse
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
-[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
-[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
-[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
-[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
-[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
-[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
-[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
-[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
-[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
-[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
-[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
-[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
-[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
-[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
-#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/nosse-5.l
@@ -0,0 +1,41 @@
+.*: Assembler messages:
+.*:9: Error: .*\.avx\.nosse.*
+.*:10: Error: .*\.avx\.nosse.*
+.*:11: Error: .*\.avx\.nosse.*
+.*:19: Error: .*\.avx512vl\.nosse.*
+.*:20: Error: .*\.avx512vl\.nosse.*
+.*:21: Error: .*\.avx512vl\.nosse.*
+.*:22: Error: .*\.avx512vl\.nosse.*
+.*:23: Error: .*\.avx512vl\.nosse.*
+.*:24: Error: .*\.avx512vl\.nosse.*
+GAS LISTING .*
+#...
+[ ]*[1-9][0-9]*[ ]+\#.*
+[ ]*[1-9][0-9]*[ ]+\.text
+[ ]*[1-9][0-9]*[ ]+\.arch generic32
+[ ]*[1-9][0-9]*[ ]+\.arch \.avx
+[ ]*[1-9][0-9]* \?\?\?\? C5D058E6[ ]+vaddps %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]* \?\?\?\? C5D458E6[ ]+vaddps %ymm6, %ymm5, %ymm4
+[ ]*[1-9][0-9]* \?\?\?\? C5D258E6[ ]+vaddss %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]*[ ]+\.arch \.nosse
+[ ]*[1-9][0-9]*[ ]+vaddps %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]*[ ]+vaddps %ymm6, %ymm5, %ymm4
+[ ]*[1-9][0-9]*[ ]+vaddss %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.arch generic32
+[ ]*[1-9][0-9]*[ ]+\.arch \.avx512vl
+[ ]*[1-9][0-9]* \?\?\?\? 62F1540F[ ]+vaddps %xmm6, %xmm5, %xmm4\{%k7\}
+[ ]*[1-9][0-9]*[ ]+58E6
+[ ]*[1-9][0-9]* \?\?\?\? 62F1542F[ ]+vaddps %ymm6, %ymm5, %ymm4\{%k7\}
+[ ]*[1-9][0-9]*[ ]+58E6
+[ ]*[1-9][0-9]* \?\?\?\? 62F15448[ ]+vaddps %zmm6, %zmm5, %zmm4
+[ ]*[1-9][0-9]*[ ]+58E6
+[ ]*[1-9][0-9]*[ ]+\.arch \.nosse
+[ ]*[1-9][0-9]*[ ]+vaddps %xmm6, %xmm5, %xmm4\{%k7\}
+[ ]*[1-9][0-9]*[ ]+vaddps %ymm6, %ymm5, %ymm4\{%k7\}
+[ ]*[1-9][0-9]*[ ]+vaddps %zmm6, %zmm5, %zmm4
+[ ]*[1-9][0-9]*[ ]+vaddps %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]*[ ]+vaddps %ymm6, %ymm5, %ymm4
+[ ]*[1-9][0-9]*[ ]+vaddss %xmm6, %xmm5, %xmm4
+[ ]*[1-9][0-9]*[ ]*
+#pass
--- a/gas/testsuite/gas/i386/nosse-5.s
+++ b/gas/testsuite/gas/i386/nosse-5.s
@@ -1,4 +1,4 @@
-# Test .arch .nosse with .noavx/.avx/.avx512vl
+# Test .arch .nosse with .avx/.avx512vl
.text
.arch generic32
.arch .avx
@@ -9,6 +9,8 @@
vaddps %xmm6, %xmm5, %xmm4
vaddps %ymm6, %ymm5, %ymm4
vaddss %xmm6, %xmm5, %xmm4
+
+ .arch generic32
.arch .avx512vl
vaddps %xmm6, %xmm5, %xmm4{%k7}
vaddps %ymm6, %ymm5, %ymm4{%k7}
@@ -20,3 +22,5 @@
vaddps %xmm6, %xmm5, %xmm4
vaddps %ymm6, %ymm5, %ymm4
vaddss %xmm6, %xmm5, %xmm4
+
+ .p2align 4
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -332,7 +332,7 @@ static initializer cpu_flag_init[] =
{ "CPU_ANY_SSE4_1_FLAGS",
"CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" },
{ "CPU_ANY_SSE4_2_FLAGS",
- "CpuSSE4_2" },
+ "CPU_ANY_AVX_FLAGS|CpuSSE4_2" },
{ "CPU_ANY_SSE4_FLAGS",
"CPU_ANY_SSE4_1_FLAGS|CpuSSE4a" },
{ "CPU_ANY_AVX_FLAGS",