This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
[PATCH v3 07/10] x86: drop further pointless/bogus DefaultSize
- From: Jan Beulich <JBeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Fri, 27 Dec 2019 09:19:05 +0000
- Subject: [PATCH v3 07/10] x86: drop further pointless/bogus DefaultSize
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mzcN6fSpWm9xXSVBh+1VOv58XiKDg1Ob30IrXnt1CGI=; b=oG76iLvyjrh4J7kNeU7sN0v0A4e2Xd4zDWoRyX0baeRf7EMcWYYtOWGXbeko1b++EAyp5iTOXli9y1UYaY4Zu4eqfPeC+WwU6m/t5SUg/ZiL3gGkQcv0oFoF0PCpaiiDCsYsbQAQxXFiW+T7PqDpnNeZ3TpXrX7EV+tT7rSJL2QSJCGbH1XEchj7hL1BAs6JeAhx6hQJ6VNRF8964s+i7ZKJHn6+g0Kng4AcxYHk0ccTav4iUuz6EWTfI/VkpFTUXXHabzgh77ro9jyNLqSlq5STqw40pbB1F1rISdDyH5dyc/7iD8QvHzEJ43mxVzO4+wRkkcwgPVQ61FQV4CHojQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BxaIoZizyJQPxdZPb5H/ahM6GWlItba8l1yHUXbVrEtn7oM8WuOSapHoMjb794vXKNaju8j1xeiLucQeJ2wuJRK0JtUwOG6HX+G1uoxRSmuc+pB2kWKo33EmNs5DF3nJeZxgUAtXoVizAMH4E8ivNZUXKMKomlWzIWbyGPhADrIZuJk6b9Smte9d2SFIPwy/2XhXMBYqIwXP+tnFWlcqjlu6GPk+MjunLeyVGdAsPx6dmkXrjcqqoVAW7ZimtONwcmctko4i4rZJ6griS3now2TAVxHTZPxV6+iFkAA2RK0NGwgyrczfjFzcusS0x5zbB39k7xTL/gQI81V/GRjumg==
- References: <a79874b2-6fcd-d65f-1163-2c9d1d8f4826@suse.com>
- 64-bit CALL permitting just a single operand size doesn't need it.
- FLDENV et al should never have had it.
It remains suspicious that a number of 64-bit only insns continue to
have the attribute, despite this being intended for .code16gcc handling
only.
gas/
2020-01-XX Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): Redo and move FLDENV et al
special case.
opcodes/
2020-01-XX Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
forms.
(fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
DefaultSize.
* i386-tbl.h: Re-generate.
---
v3: New.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6378,10 +6378,7 @@ process_suffix (void)
/* Undo the movsx/movzx change done above. */
i.operands = numop;
}
- else if (i.tm.opcode_modifier.defaultsize
- && !i.suffix
- /* exclude fldenv/frstor/fsave/fstenv */
- && i.tm.opcode_modifier.no_ssuf)
+ else if (i.tm.opcode_modifier.defaultsize && !i.suffix)
{
i.suffix = stackop_size;
if (stackop_size == LONG_MNEM_SUFFIX)
@@ -6431,7 +6428,9 @@ process_suffix (void)
if (!i.suffix
&& !i.tm.opcode_modifier.defaultsize
- && !i.tm.opcode_modifier.ignoresize)
+ && !i.tm.opcode_modifier.ignoresize
+ /* Accept FLDENV et al without suffix. */
+ && (i.tm.opcode_modifier.no_ssuf || i.tm.opcode_modifier.floatmf))
{
unsigned int suffixes, evex = 0;
i386_cpu_flags cpu;
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -368,10 +368,10 @@ shrd, 2, 0xfad, None, 2, Cpu386, Modrm|C
// Control transfer instructions.
call, 1, 0xe8, None, 1, CpuNo64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp16|Disp32 }
call, 1, 0xe8, None, 1, Cpu64, AMD64|JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32S }
-call, 1, 0xe8, None, 1, Cpu64, Intel64|JumpDword|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp32S }
+call, 1, 0xe8, None, 1, Cpu64, Intel64|JumpDword|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp32S }
call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex }
call, 1, 0xff, 0x2, 1, Cpu64, AMD64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex }
-call, 1, 0xff, 0x2, 1, Cpu64, Intel64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
+call, 1, 0xff, 0x2, 1, Cpu64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
// Intel Syntax
call, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
// Intel Syntax
@@ -789,13 +789,13 @@ fstsw, 1, 0xdd, 0x7, 1, CpuFP, Modrm|Ign
fstsw, 0, 0xdfe0, None, 2, Cpu287|Cpu387, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|FWait, { 0 }
fnclex, 0, 0xdbe2, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
fclex, 0, 0xdbe2, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|FWait, { 0 }
-// Short forms of fldenv, fstenv use data size prefix.
-fnstenv, 1, 0xd9, 0x6, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
-fstenv, 1, 0xd9, 0x6, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf|FWait, { Unspecified|BaseIndex }
-fldenv, 1, 0xd9, 0x4, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
-fnsave, 1, 0xdd, 0x6, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
-fsave, 1, 0xdd, 0x6, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf|FWait, { Unspecified|BaseIndex }
-frstor, 1, 0xdd, 0x4, 1, CpuFP, Modrm|DefaultSize|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+// Short forms of fldenv, fstenv, fsave, and frstor use data size prefix.
+fnstenv, 1, 0xd9, 0x6, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+fstenv, 1, 0xd9, 0x6, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf|FWait, { Unspecified|BaseIndex }
+fldenv, 1, 0xd9, 0x4, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+fnsave, 1, 0xdd, 0x6, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+fsave, 1, 0xdd, 0x6, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf|FWait, { Unspecified|BaseIndex }
+frstor, 1, 0xdd, 0x4, 1, CpuFP, Modrm|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
// 8087 only
fneni, 0, 0xdbe0, None, 2, Cpu8087, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
feni, 0, 0xdbe0, None, 2, Cpu8087, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|FWait, { 0 }