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[PATCH v3 08/10] x86-64: also diagnose far returns / IRET with ambiguous operand size
- From: Jan Beulich <JBeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Fri, 27 Dec 2019 09:19:36 +0000
- Subject: [PATCH v3 08/10] x86-64: also diagnose far returns / IRET with ambiguous operand size
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- References: <a79874b2-6fcd-d65f-1163-2c9d1d8f4826@suse.com>
Other than near returns these default to 32-bit operand size, and hence
it isn't really unlikely that 64-bit forms are meant. Hence these should
have disambiguating suffixes. In Intel mode, however, don't error in
these cases unconditionally - MASM accepts these without suffix _and_
without warning.
gas/
2020-01-XX Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): .
testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
Add LRETQ case.
testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
suffix.
testsuite/gas/i386/x86_64.s: Add RETF cases.
* testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
testsuite/gas/i386/x86-64-opcode.d,
testsuite/gas/i386/x86-64-suffix-intel.d,
testsuite/gas/i386/x86-64-suffix.d,
testsuite/gas/i386/x86_64-intel.d
testsuite/gas/i386/x86_64.d: Adjust expectations.
* testsuite/gas/i386/x86-64-suffix.e,
testsuite/gas/i386/x86_64.e: New.
---
v3: New.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6427,7 +6427,11 @@ process_suffix (void)
}
if (!i.suffix
- && !i.tm.opcode_modifier.defaultsize
+ && (!i.tm.opcode_modifier.defaultsize
+ /* Also cover lret/retf/iret in 64-bit mode. */
+ || (flag_code == CODE_64BIT
+ && !i.tm.opcode_modifier.no_lsuf
+ && !i.tm.opcode_modifier.no_qsuf))
&& !i.tm.opcode_modifier.ignoresize
/* Accept FLDENV et al without suffix. */
&& (i.tm.opcode_modifier.no_ssuf || i.tm.opcode_modifier.floatmf))
@@ -6499,7 +6503,9 @@ process_suffix (void)
/* Are multiple suffixes / operand sizes allowed? */
if (suffixes & (suffixes - 1))
{
- if (intel_syntax)
+ if (intel_syntax
+ && (!i.tm.opcode_modifier.defaultsize
+ || operand_check == check_error))
{
as_bad (_("ambiguous operand size for `%s'"), i.tm.name);
return 0;
@@ -6511,9 +6517,12 @@ process_suffix (void)
return 0;
}
if (operand_check == check_warning)
- as_warn (_("no instruction mnemonic suffix given and "
- "no register operands; using default for `%s'"),
- i.tm.name);
+ as_warn (_("%s; using default for `%s'"),
+ intel_syntax
+ ? _("ambiguous operand size")
+ : _("no instruction mnemonic suffix given and "
+ "no register operands"),
+ i.tm.name);
if (i.tm.opcode_modifier.floatmf)
i.suffix = SHORT_MNEM_SUFFIX;
--- a/gas/testsuite/gas/i386/k1om.d
+++ b/gas/testsuite/gas/i386/k1om.d
@@ -2,6 +2,7 @@
#as: -J -march=k1om
#objdump: -dw
#name: k1om
+#warning_output: x86_64.e
#notarget: *-*-nacl*
.*: +file format elf64-k1om.*
@@ -54,7 +55,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
-[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
+[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
@@ -86,10 +87,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
-[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
-[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
-[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
-[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
+[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
@@ -106,8 +107,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
+[ ]*[a-f0-9]+: 66 cb lretw *
+[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
+[ ]*[a-f0-9]+: 48 cb lretq *
+[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
-0+1a7 <bar>:
+[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -115,7 +124,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -123,9 +132,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
-0+203 <foo>:
+[0-9a-f]+ <foo>:
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
--- a/gas/testsuite/gas/i386/l1om.d
+++ b/gas/testsuite/gas/i386/l1om.d
@@ -2,6 +2,7 @@
#as: -J -march=l1om
#objdump: -dw --insn-width=7
#name: l1om
+#warning_output: x86_64.e
#notarget: *-*-nacl*
.*: +file format elf64-l1om.*
@@ -54,7 +55,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
-[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
+[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
@@ -86,10 +87,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
-[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
-[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
-[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
-[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
+[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
@@ -106,8 +107,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
+[ ]*[a-f0-9]+: 66 cb lretw *
+[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
+[ ]*[a-f0-9]+: 48 cb lretq *
+[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
-0+1a7 <bar>:
+[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -115,7 +124,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -123,9 +132,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
-0+203 <foo>:
+[0-9a-f]+ <foo>:
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -66,6 +66,7 @@ Disassembly of section .text:
*[a-f0-9]+: ff 00 incl \(%rax\)
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
+ *[a-f0-9]+: cf iret *
*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
*[a-f0-9]+: 0f 01 18 lidt \(%rax\)
@@ -73,6 +74,8 @@ Disassembly of section .text:
*[a-f0-9]+: 0f 01 30 lmsw \(%rax\)
*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
+ *[a-f0-9]+: cb lret *
+ *[a-f0-9]+: ca 04 00 lret \$0x4
*[a-f0-9]+: 0f 00 18 ltr \(%rax\)
*[a-f0-9]+: c7 00 12 00 00 00 movl \$0x12,\(%rax\)
*[a-f0-9]+: c7 00 34 12 00 00 movl \$0x1234,\(%rax\)
--- a/gas/testsuite/gas/i386/noreg64.l
+++ b/gas/testsuite/gas/i386/noreg64.l
@@ -57,8 +57,11 @@
.*:[1-9][0-9]*: Warning: .* `inc'
.*:[1-9][0-9]*: Warning: .* `ins'
.*:[1-9][0-9]*: Warning: .* `ins'
+.*:[1-9][0-9]*: Warning: .* `iret'
.*:[1-9][0-9]*: Warning: .* `lods'
.*:[1-9][0-9]*: Warning: .* `lods'
+.*:[1-9][0-9]*: Warning: .* `lret'
+.*:[1-9][0-9]*: Warning: .* `lret'
.*:[1-9][0-9]*: Warning: .* `mov'
.*:[1-9][0-9]*: Warning: .* `mov'
.*:[1-9][0-9]*: Warning: .* `mov'
--- a/gas/testsuite/gas/i386/noreg64.s
+++ b/gas/testsuite/gas/i386/noreg64.s
@@ -59,6 +59,7 @@ noreg:
inc (%rax)
ins
ins %dx, %es:(%rdi)
+ iret
jmp *(%rax)
lgdt (%rax)
lidt (%rax)
@@ -66,6 +67,8 @@ noreg:
lmsw (%rax)
lods
lods (%rsi)
+ lret
+ lret $4
ltr (%rax)
mov $0x12, (%rax)
mov $0x1234, (%rax)
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -12,6 +12,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 41 ff 10 callq \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: cb lret
+[ ]*[a-f0-9]+: 48 cb lretq *
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: cf iret
[ ]*[a-f0-9]+: 66 cf iretw
--- a/gas/testsuite/gas/i386/x86-64-opcode.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode.s
@@ -9,11 +9,12 @@
CALLq *(%rax) # -- -- -- -- FF 10
# RET
- lret # -- -- -- -- CB
+ lretl # -- -- -- -- CB
+ lretq # -- -- -- 48 CB
retq # -- -- -- -- C3
# IRET
- IRET # -- -- -- -- CF ; 32-bit operand size
+ IRETL # -- -- -- -- CF ; 32-bit operand size
IRETW # 66 -- -- -- CF ; O16 for 16-bit operand size
IRETQ # -- -- -- 48 CF ; REX for 64-bit operand size
--- a/gas/testsuite/gas/i386/x86-64-suffix-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-suffix-intel.d
@@ -1,6 +1,7 @@
#source: x86-64-suffix.s
#objdump: -dw -Msuffix,intel
#name: x86-64 suffix (Intel mode)
+#warning_output: x86-64-suffix.e
.*: +file format .*
@@ -15,7 +16,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 66 cf iretw
[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: cf iretd
[ ]*[a-f0-9]+: 48 cf iretq
[ ]*[a-f0-9]+: 0f 07 sysretd
[ ]*[a-f0-9]+: 48 0f 07 sysretq
--- a/gas/testsuite/gas/i386/x86-64-suffix.d
+++ b/gas/testsuite/gas/i386/x86-64-suffix.d
@@ -1,5 +1,6 @@
#objdump: -dwMsuffix
#name: x86-64 suffix (AT&T mode)
+#warning_output: x86-64-suffix.e
.*: +file format .*
@@ -14,7 +15,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 66 cf iretw
[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: cf iretl
[ ]*[a-f0-9]+: 48 cf iretq
[ ]*[a-f0-9]+: 0f 07 sysretl
[ ]*[a-f0-9]+: 48 0f 07 sysretq
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-suffix.e
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:[1-9][0-9]*: Warning: .* `iret'
--- a/gas/testsuite/gas/i386/x86-64-suffix.s
+++ b/gas/testsuite/gas/i386/x86-64-suffix.s
@@ -12,7 +12,6 @@ foo:
iretw
iretl
- iret
iretq
sysretl
sysretq
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -2,6 +2,7 @@
#as: -J
#objdump: -dw -Mintel
#name: x86-64 (Intel mode)
+#warning_output: x86_64.e
.*: +file format .*
@@ -52,7 +53,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 41 03 00 add eax,DWORD PTR \[r8\]
[ ]*[a-f0-9]+: 45 03 00 add r8d,DWORD PTR \[r8\]
[ ]*[a-f0-9]+: 49 03 00 add rax,QWORD PTR \[r8\]
-[ ]*[a-f0-9]+: 03 05 22 22 22 22 add eax,DWORD PTR \[rip\+0x22222222\] # 222222c7 <foo\+0x222220c4>
+[ ]*[a-f0-9]+: 03 05 22 22 22 22 add eax,DWORD PTR \[rip\+0x22222222\] # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 03 45 00 add eax,DWORD PTR \[rbp\+0x0\]
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add eax,DWORD PTR ds:0x22222222
[ ]*[a-f0-9]+: 41 03 45 00 add eax,DWORD PTR \[r13\+0x0\]
@@ -84,10 +85,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 83 04 81 11 add DWORD PTR \[rcx\+rax\*4\],0x11
[ ]*[a-f0-9]+: 41 83 04 81 11 add DWORD PTR \[r9\+rax\*4\],0x11
[ ]*[a-f0-9]+: 42 83 04 81 11 add DWORD PTR \[rcx\+r8\*4\],0x11
-[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 add DWORD PTR \[rip\+0x22222222\],0x33 # 22222342 <foo\+0x2222213f>
-[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 add QWORD PTR \[rip\+0x22222222\],0x33 # 2222234a <foo\+0x22222147>
-[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 add DWORD PTR \[rip\+0x22222222\],0x33333333 # 22222354 <foo\+0x22222151>
-[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 add QWORD PTR \[rip\+0x22222222\],0x33333333 # 2222235f <foo\+0x2222215c>
+[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 add DWORD PTR \[rip\+0x22222222\],0x33 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 add QWORD PTR \[rip\+0x22222222\],0x33 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 add DWORD PTR \[rip\+0x22222222\],0x33333333 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 add QWORD PTR \[rip\+0x22222222\],0x33333333 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 add DWORD PTR \[rax\*8\+0x22222222\],0x33
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 add DWORD PTR \[rax\+0x22222222\],0x33
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 add DWORD PTR \[rax\+0x22222222\],0x33
@@ -104,8 +105,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 63 c0 movsxd rax,eax
[ ]*[a-f0-9]+: 48 0f bf c0 movsx rax,ax
[ ]*[a-f0-9]+: 48 0f be c0 movsx rax,al
+[ ]*[a-f0-9]+: cb retf *
+[ ]*[a-f0-9]+: ca 10 00 retf 0x10
+[ ]*[a-f0-9]+: 66 cb retfw *
+[ ]*[a-f0-9]+: 66 ca 02 00 retfw 0x2
+[ ]*[a-f0-9]+: cb retf *
+[ ]*[a-f0-9]+: ca 04 00 retf 0x4
+[ ]*[a-f0-9]+: 48 cb rex\.W retf *
+[ ]*[a-f0-9]+: 48 ca 08 00 rex\.W retf 0x8
-0+1a7 <bar>:
+[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: b0 00 mov al,0x0
[ ]*[a-f0-9]+: 66 b8 00 00 mov ax,0x0
[ ]*[a-f0-9]+: b8 00 00 00 00 mov eax,0x0
@@ -113,7 +122,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs eax,ds:0x0
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov eax,DWORD PTR ds:0x0
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov eax,DWORD PTR \[rax\+0x0\]
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # 1d5 <bar\+0x2e>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: b0 00 mov al,0x0
[ ]*[a-f0-9]+: 66 b8 00 00 mov ax,0x0
[ ]*[a-f0-9]+: b8 00 00 00 00 mov eax,0x0
@@ -121,9 +130,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs eax,ds:0x0
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov eax,DWORD PTR ds:0x0
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov eax,DWORD PTR \[rax\+0x0\]
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # 203 <foo>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # [0-9a-f]+ <foo>
-0+203 <foo>:
+[0-9a-f]+ <foo>:
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs al,ds:0x8877665544332211
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs ax,ds:0x8877665544332211
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs eax,ds:0x8877665544332211
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -1,6 +1,8 @@
#as: -J
#objdump: -dw
#name: x86_64
+#warning_output: x86_64.e
+
.*: +file format .*
Disassembly of section .text:
@@ -51,7 +53,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
-[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
+[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
@@ -83,10 +85,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
-[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
-[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
-[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
-[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
+[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
+[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
@@ -103,8 +105,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
+[ ]*[a-f0-9]+: 66 cb lretw *
+[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
+[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
+[ ]*[a-f0-9]+: 48 cb lretq *
+[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
-0+1a7 <bar>:
+[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -112,7 +122,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
@@ -120,9 +130,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
-[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
-0+203 <foo>:
+[0-9a-f]+ <foo>:
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86_64.e
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*:[1-9][0-9]*: Warning: .* `retf'
+.*:[1-9][0-9]*: Warning: .* `retf'
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -99,6 +99,14 @@ cdqe
movsx rax, eax
movsx rax, ax
movsx rax, al
+retf
+retf 16
+retfw
+retfw 2
+retfd
+retfd 4
+retfq
+retfq 8
bar:
.att_syntax
#testcase for symbol references.