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[PATCH 1/3] x86: consistently convert to byte registers for TEST w/ imm optimization
- From: Jan Beulich <jbeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Mon, 16 Dec 2019 11:03:47 +0100
- Subject: [PATCH 1/3] x86: consistently convert to byte registers for TEST w/ imm optimization
- References: <562971e7-f26b-ba63-e52b-2aabe126ad6d@suse.com>
Commit ac0ab1842d ("i386: Also check R12-R15 registers when optimizing
testq to testb") didn't go quite far enough: In order to avoid confusing
other code registers would better be converted to byte ones uniformly.
gas/
2019-12-XX Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (optimize_encoding): Generalize register
transformation for TEST optimization.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3932,17 +3932,16 @@ optimize_encoding (void)
i.types[1].bitfield.byte = 1;
/* Ignore the suffix. */
i.suffix = 0;
- if (base_regnum >= 4)
- {
- /* Handle SP, BP, SI, DI and R12-R15 registers. */
- if (i.types[1].bitfield.word)
- j = 16;
- else if (i.types[1].bitfield.dword)
- j = 32;
- else
- j = 48;
- i.op[1].regs -= j;
- }
+ /* Convert to byte registers. */
+ if (i.types[1].bitfield.word)
+ j = 16;
+ else if (i.types[1].bitfield.dword)
+ j = 32;
+ else
+ j = 48;
+ if (!(i.op[1].regs->reg_flags & RegRex) && base_regnum < 4)
+ j += 8;
+ i.op[1].regs -= j;
}
}
else if (flag_code == CODE_64BIT