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[PATCH] x86: further refine SSE check (SSE4a, SHA, GFNI)

From: Jan Beulich <jbeulich at suse dot com>
To: "binutils at sourceware dot org" <binutils at sourceware dot org>
Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
Date: Mon, 9 Dec 2019 13:39:47 +0100
Subject: [PATCH] x86: further refine SSE check (SSE4a, SHA, GFNI)

In  ("x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns") I went
both a little too far and not quite far enough:
- GFNI insns also have AVX512 variants, which also shouldn't get
  diagnosed,
- SSE4a insns should get diagnosed just like SSE4.x ones,
- SHA insns should get diagnosed just like PCLMULQDQ or AES ones.

gas/
2018-12-XX  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Extend SSE check conditional.
	* testsuite/gas/i386/sse-check.s: Add SSE4a and SHA tests.
	Extend GFNI tests.
	* testsuite/gas/i386/sse-check.d: Adjust expectations.
	* testsuite/gas/i386/sse-check-error.l,
	testsuite/gas/i386/x86-64-sse-check-error.l: Likewise.
	* testsuite/gas/i386/sse-check-warn.e: Likewise.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4286,14 +4286,17 @@ md_assemble (char *line)
   if (sse_check != check_none
       && !i.tm.opcode_modifier.noavx
       && !i.tm.cpu_flags.bitfield.cpuavx
+      && !i.tm.cpu_flags.bitfield.cpuavx512f
       && (i.tm.cpu_flags.bitfield.cpusse
 	  || i.tm.cpu_flags.bitfield.cpusse2
 	  || i.tm.cpu_flags.bitfield.cpusse3
 	  || i.tm.cpu_flags.bitfield.cpussse3
 	  || i.tm.cpu_flags.bitfield.cpusse4_1
 	  || i.tm.cpu_flags.bitfield.cpusse4_2
+	  || i.tm.cpu_flags.bitfield.cpusse4a
 	  || i.tm.cpu_flags.bitfield.cpupclmul
 	  || i.tm.cpu_flags.bitfield.cpuaes
+	  || i.tm.cpu_flags.bitfield.cpusha
 	  || i.tm.cpu_flags.bitfield.cpugfni))
     {
       (sse_check == check_warning
--- a/gas/testsuite/gas/i386/sse-check-error.l
+++ b/gas/testsuite/gas/i386/sse-check-error.l
@@ -8,6 +8,8 @@
 .*:23: Error: .*
 .*:26: Error: .*
 .*:29: Error: .*
+.*:32: Error: .*
+.*:35: Error: .*
 GAS LISTING .*
 
 
@@ -42,17 +44,33 @@ GAS LISTING .*
 .*  Error: SSE instruction `pcmpgtq' is used
 [ 	]*20[ 	]+C1
 [ 	]*21[ 	]+
-[ 	]*22[ 	]+\# PCMUL instruction
-[ 	]*23[ 	]+\?\?\?\? 660F3A44 		pclmulqdq \$-1,%xmm1,%xmm2
-.*  Error: SSE instruction `pclmulqdq' is used
-[ 	]*23[ 	]+D1FF
+[ 	]*22[ 	]+\# SSE4a instruction
+[ 	]*23[ 	]+\?\?\?\? 660F78C0 		extrq \$0, \$0, %xmm0
+.*  Error: SSE instruction `extrq' is used
+[ 	]*23[ 	]+0000
 [ 	]*24[ 	]+
-[ 	]*25[ 	]+\# AES instructions
-[ 	]*26[ 	]+\?\?\?\? 660F38DE 		aesdec %xmm1,%xmm2
-.*  Error: SSE instruction `aesdec' is used
-[ 	]*26[ 	]+D1
+[ 	]*25[ 	]+\# PCMUL instruction
+[ 	]*26[ 	]+\?\?\?\? 660F3A44 		pclmulqdq \$-1,%xmm1,%xmm2
+.*  Error: SSE instruction `pclmulqdq' is used
+[ 	]*26[ 	]+D1FF
 [ 	]*27[ 	]+
-[ 	]*28[ 	]+\# GFNI instructions
-[ 	]*29[ 	]+\?\?\?\? 660F38CF 		gf2p8mulb %xmm1,%xmm2
-.*  Error: SSE instruction `gf2p8mulb' is used
+[ 	]*28[ 	]+\# AES instructions
+[ 	]*29[ 	]+\?\?\?\? 660F38DE 		aesdec %xmm1,%xmm2
+.*  Error: SSE instruction `aesdec' is used
 [ 	]*29[ 	]+D1
+[ 	]*30[ 	]+
+[ 	]*31[ 	]+\# SHA instruction
+[ 	]*32[ 	]+\?\?\?\? 0F38C8C0 		sha1nexte %xmm0, %xmm0
+.*  Error: SSE instruction `sha1nexte' is used
+[ 	]*33[ 	]+
+[ 	]*34[ 	]+\# GFNI instructions
+[ 	]*35[ 	]+\?\?\?\? 660F38CF 		gf2p8mulb %xmm1,%xmm2
+.*  Error: SSE instruction `gf2p8mulb' is used
+[ 	]*35[ 	]+D1
+[ 	]*36[ 	]+\?\?\?\? 62F27D09 		vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
+[ 	]*36[ 	]+CFC0
+[ 	]*37[ 	]+\?\?\?\? 62F27D48 		vgf2p8mulb %zmm0, %zmm0, %zmm0
+GAS LISTING .*
+
+
+[ 	]*37[ 	]+CFC0
--- a/gas/testsuite/gas/i386/sse-check-warn.e
+++ b/gas/testsuite/gas/i386/sse-check-warn.e
@@ -5,6 +5,8 @@
 .*:16: Warning: SSE instruction `phaddw' is used
 .*:19: Warning: SSE instruction `blendvpd' is used
 .*:20: Warning: SSE instruction `pcmpgtq' is used
-.*:23: Warning: SSE instruction `pclmulqdq' is used
-.*:26: Warning: SSE instruction `aesdec' is used
-.*:29: Warning: SSE instruction `gf2p8mulb' is used
+.*:23: Warning: SSE instruction `extrq' is used
+.*:26: Warning: SSE instruction `pclmulqdq' is used
+.*:29: Warning: SSE instruction `aesdec' is used
+.*:32: Warning: SSE instruction `sha1nexte' is used
+.*:35: Warning: SSE instruction `gf2p8mulb' is used
--- a/gas/testsuite/gas/i386/sse-check.d
+++ b/gas/testsuite/gas/i386/sse-check.d
@@ -13,7 +13,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 38 01 ca       	phaddw %xmm2,%xmm1
 [ 	]*[a-f0-9]+:	66 0f 38 15 c1       	blendvpd %xmm0,%xmm1,%xmm0
 [ 	]*[a-f0-9]+:	66 0f 38 37 c1       	pcmpgtq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 78 c0 00 00    	extrq  \$0x0,\$0x0,%xmm0
 [ 	]*[a-f0-9]+:	66 0f 3a 44 d1 ff    	pclmulqdq \$0xff,%xmm1,%xmm2
 [ 	]*[a-f0-9]+:	66 0f 38 de d1       	aesdec %xmm1,%xmm2
+[ 	]*[a-f0-9]+:	0f 38 c8 c0          	sha1nexte %xmm0,%xmm0
 [ 	]*[a-f0-9]+:	66 0f 38 cf d1       	gf2p8mulb %xmm1,%xmm2
+[ 	]*[a-f0-9]+:	62 f2 7d 09 cf c0    	vgf2p8mulb %xmm0,%xmm0,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:	62 f2 7d 48 cf c0    	vgf2p8mulb %zmm0,%zmm0,%zmm0
 #pass
--- a/gas/testsuite/gas/i386/sse-check.s
+++ b/gas/testsuite/gas/i386/sse-check.s
@@ -19,11 +19,19 @@ _start:
 	blendvpd %xmm0,%xmm1,%xmm0
 	pcmpgtq %xmm1,%xmm0
 
+# SSE4a instruction
+	extrq $0, $0, %xmm0
+
 # PCMUL instruction
 	pclmulqdq $-1,%xmm1,%xmm2
 
 # AES instructions
 	aesdec %xmm1,%xmm2
 
+# SHA instruction
+	sha1nexte %xmm0, %xmm0
+
 # GFNI instructions
 	gf2p8mulb %xmm1,%xmm2
+	vgf2p8mulb %xmm0, %xmm0, %xmm0{%k1}
+	vgf2p8mulb %zmm0, %zmm0, %zmm0
--- a/gas/testsuite/gas/i386/x86-64-sse-check-error.l
+++ b/gas/testsuite/gas/i386/x86-64-sse-check-error.l
@@ -8,6 +8,8 @@
 .*:23: Error: .*
 .*:26: Error: .*
 .*:29: Error: .*
+.*:32: Error: .*
+.*:35: Error: .*
 GAS LISTING .*
 
 
@@ -42,17 +44,33 @@ GAS LISTING .*
 .*  Error: SSE instruction `pcmpgtq' is used
 [ 	]*20[ 	]+C1
 [ 	]*21[ 	]+
-[ 	]*22[ 	]+\# PCMUL instruction
-[ 	]*23[ 	]+\?\?\?\? 660F3A44 		pclmulqdq \$-1,%xmm1,%xmm2
-.*  Error: SSE instruction `pclmulqdq' is used
-[ 	]*23[ 	]+D1FF
+[ 	]*22[ 	]+\# SSE4a instruction
+[ 	]*23[ 	]+\?\?\?\? 660F78C0 		extrq \$0, \$0, %xmm0
+.*  Error: SSE instruction `extrq' is used
+[ 	]*23[ 	]+0000
 [ 	]*24[ 	]+
-[ 	]*25[ 	]+\# AES instructions
-[ 	]*26[ 	]+\?\?\?\? 660F38DE 		aesdec %xmm1,%xmm2
-.*  Error: SSE instruction `aesdec' is used
-[ 	]*26[ 	]+D1
+[ 	]*25[ 	]+\# PCMUL instruction
+[ 	]*26[ 	]+\?\?\?\? 660F3A44 		pclmulqdq \$-1,%xmm1,%xmm2
+.*  Error: SSE instruction `pclmulqdq' is used
+[ 	]*26[ 	]+D1FF
 [ 	]*27[ 	]+
-[ 	]*28[ 	]+\# GFNI instructions
-[ 	]*29[ 	]+\?\?\?\? 660F38CF 		gf2p8mulb %xmm1,%xmm2
-.*  Error: SSE instruction `gf2p8mulb' is used
+[ 	]*28[ 	]+\# AES instructions
+[ 	]*29[ 	]+\?\?\?\? 660F38DE 		aesdec %xmm1,%xmm2
+.*  Error: SSE instruction `aesdec' is used
 [ 	]*29[ 	]+D1
+[ 	]*30[ 	]+
+[ 	]*31[ 	]+\# SHA instruction
+[ 	]*32[ 	]+\?\?\?\? 0F38C8C0 		sha1nexte %xmm0, %xmm0
+.*  Error: SSE instruction `sha1nexte' is used
+[ 	]*33[ 	]+
+[ 	]*34[ 	]+\# GFNI instructions
+[ 	]*35[ 	]+\?\?\?\? 660F38CF 		gf2p8mulb %xmm1,%xmm2
+.*  Error: SSE instruction `gf2p8mulb' is used
+[ 	]*35[ 	]+D1
+[ 	]*36[ 	]+\?\?\?\? 62F27D09 		vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
+[ 	]*36[ 	]+CFC0
+[ 	]*37[ 	]+\?\?\?\? 62F27D48 		vgf2p8mulb %zmm0, %zmm0, %zmm0
+GAS LISTING .*
+
+
+[ 	]*37[ 	]+CFC0

Follow-Ups:
- Re: [PATCH] x86: further refine SSE check (SSE4a, SHA, GFNI)
  - From: H.J. Lu

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