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Re: [PATCH][gas] Implement .cfi_negate_ra_state directive

From: Alan Modra <amodra at gmail dot com>
To: Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>
Cc: binutils at sourceware dot org
Date: Sun, 8 Dec 2019 21:54:33 +1030
Subject: Re: [PATCH][gas] Implement .cfi_negate_ra_state directive
References: <9220c1d3-a4ee-1fe4-b201-d31afa07cfab@foss.arm.com>
On Thu, Dec 05, 2019 at 11:00:26AM +0000, Kyrill Tkachov wrote:
>     * dw2gencfi.c (cfi_pseudo_table): Add cfi_negate_ra_state.
>     * testsuite/gas/aarch64/pac_negate_ra_state.s: New file.
>     * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.

The new pac_negate_ra_state test adds yet another failure on aarch64
ipl32 targets.  This patch fixes that particular problem and a few
more that are trivial to fix.

It'd be nice if some arm.com people could tidy this all.

	* testsuite/gas/aarch64/bfloat16.d: Match 32-bit and 64-bit output.
	* testsuite/gas/aarch64/dgh.d: Likewise.
	* testsuite/gas/aarch64/f32mm.d: Likewise.
	* testsuite/gas/aarch64/f64mm.d: Likewise.
	* testsuite/gas/aarch64/i8mm.d: Likewise.
	* testsuite/gas/aarch64/pac_ab_key.d: Likewise.
	* testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
	* testsuite/gas/aarch64/reloc-prel_g0.d: Likewise.
	* testsuite/gas/aarch64/reloc-prel_g0_nc.d: Likewise.
	* testsuite/gas/aarch64/reloc-prel_g1.d: Likewise.
	* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Likewise.
	* testsuite/gas/aarch64/sve-movprfx-mm.d: Likewise.
	* testsuite/gas/aarch64/sve2.d: Likewise.

diff --git a/gas/testsuite/gas/aarch64/bfloat16.d b/gas/testsuite/gas/aarch64/bfloat16.d
index 78d10cb3ca..176af8b520 100644
--- a/gas/testsuite/gas/aarch64/bfloat16.d
+++ b/gas/testsuite/gas/aarch64/bfloat16.d
@@ -6,7 +6,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	647b82b1 	bfdot	z17\.s, z21\.h, z27\.h
  *[0-9a-f]+:	64608000 	bfdot	z0\.s, z0\.h, z0\.h
  *[0-9a-f]+:	647d42b1 	bfdot	z17\.s, z21\.h, z5\.h\[3\]
diff --git a/gas/testsuite/gas/aarch64/dgh.d b/gas/testsuite/gas/aarch64/dgh.d
index 6e196015a6..9d11bec971 100644
--- a/gas/testsuite/gas/aarch64/dgh.d
+++ b/gas/testsuite/gas/aarch64/dgh.d
@@ -6,6 +6,6 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]*:	d50320df 	hint	#0x6
  *[0-9a-f]*:	d50320df 	hint	#0x6
diff --git a/gas/testsuite/gas/aarch64/f32mm.d b/gas/testsuite/gas/aarch64/f32mm.d
index 8f1cdffa5e..0481852def 100644
--- a/gas/testsuite/gas/aarch64/f32mm.d
+++ b/gas/testsuite/gas/aarch64/f32mm.d
@@ -6,6 +6,6 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	64bbe6b1 	fmmla	z17\.s, z21\.s, z27\.s
  *[0-9a-f]+:	64a0e400 	fmmla	z0\.s, z0\.s, z0\.s
diff --git a/gas/testsuite/gas/aarch64/f64mm.d b/gas/testsuite/gas/aarch64/f64mm.d
index 9540c136c8..a09179a93b 100644
--- a/gas/testsuite/gas/aarch64/f64mm.d
+++ b/gas/testsuite/gas/aarch64/f64mm.d
@@ -5,7 +5,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	64dbe6b1 	fmmla	z17\.d, z21\.d, z27\.d
  *[0-9a-f]+:	64c0e400 	fmmla	z0\.d, z0\.d, z0\.d
  *[0-9a-f]+:	a43b17f1 	ld1rob	{z17\.b}, p5/z, \[sp, x27\]
diff --git a/gas/testsuite/gas/aarch64/i8mm.d b/gas/testsuite/gas/aarch64/i8mm.d
index 14db65f740..5d667f56c9 100644
--- a/gas/testsuite/gas/aarch64/i8mm.d
+++ b/gas/testsuite/gas/aarch64/i8mm.d
@@ -6,7 +6,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	451b9ab1 	smmla	z17\.s, z21\.b, z27\.b
  *[0-9a-f]+:	45009800 	smmla	z0\.s, z0\.b, z0\.b
  *[0-9a-f]+:	45db9ab1 	ummla	z17\.s, z21\.b, z27\.b
diff --git a/gas/testsuite/gas/aarch64/pac_ab_key.d b/gas/testsuite/gas/aarch64/pac_ab_key.d
index a428633448..ea9cf2fb38 100644
--- a/gas/testsuite/gas/aarch64/pac_ab_key.d
+++ b/gas/testsuite/gas/aarch64/pac_ab_key.d
@@ -7,7 +7,7 @@
 
 Contents of the .eh_frame section:
 
-00000000 0000000000000010 00000000 CIE
+0+ 0+10 0+ CIE
   Version:               1
   Augmentation:          "zR"
   Code alignment factor: 4
@@ -16,17 +16,17 @@ Contents of the .eh_frame section:
   Augmentation data:     1b
   DW_CFA_def_cfa: r31 \(sp\) ofs 0
 
-00000014 0000000000000018 00000018 FDE cie=00000000 pc=0000000000000000..0000000000000008
-  DW_CFA_advance_loc: 4 to 0000000000000004
+0+14 0+18 0+18 FDE cie=0+ pc=0+\.\.0+8
+  DW_CFA_advance_loc: 4 to 0+4
   DW_CFA_GNU_window_save
-  DW_CFA_advance_loc: 4 to 0000000000000008
+  DW_CFA_advance_loc: 4 to 0+8
   DW_CFA_def_cfa_offset: 16
   DW_CFA_offset: r29 \(x29\) at cfa-16
   DW_CFA_offset: r30 \(x30\) at cfa-8
   DW_CFA_nop
   DW_CFA_nop
 
-00000030 0000000000000014 00000000 CIE
+0+30 0+14 0+ CIE
   Version:               1
   Augmentation:          "zRB"
   Code alignment factor: 4
@@ -38,17 +38,17 @@ Contents of the .eh_frame section:
   DW_CFA_nop
   DW_CFA_nop
 
-00000048 000000000000001c 0000001c FDE cie=00000030 pc=0000000000000008..0000000000000010
-  DW_CFA_advance_loc: 4 to 000000000000000c
+0+48 0+1(c|8) 0+1c FDE cie=0+30 pc=0+8\.\.0+10
+  DW_CFA_advance_loc: 4 to 0+c
   DW_CFA_GNU_window_save
-  DW_CFA_advance_loc: 4 to 0000000000000010
+  DW_CFA_advance_loc: 4 to 0+10
   DW_CFA_def_cfa_offset: 16
   DW_CFA_offset: r29 \(x29\) at cfa-16
   DW_CFA_offset: r30 \(x30\) at cfa-8
   DW_CFA_nop
   DW_CFA_nop
-  DW_CFA_nop
-  DW_CFA_nop
-  DW_CFA_nop
-  DW_CFA_nop
+#?  DW_CFA_nop
+#?  DW_CFA_nop
+#?  DW_CFA_nop
+#?  DW_CFA_nop
 
diff --git a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
index 7ab0f2369d..cef533a734 100644
--- a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
+++ b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
@@ -4,7 +4,7 @@
 
 Contents of the .eh_frame section:
 
-00000000 0000000000000010 00000000 CIE
+0+ 0+10 0+ CIE
   Version:               1
   Augmentation:          "zR"
   Code alignment factor: 4
@@ -13,14 +13,12 @@ Contents of the .eh_frame section:
   Augmentation data:     1b
   DW_CFA_def_cfa: r31 \(sp\) ofs 0
 
-00000014 0000000000000018 00000018 FDE cie=00000000 pc=0000000000000000..0000000000000008
-  DW_CFA_advance_loc: 4 to 0000000000000004
+0+14 0+18 0+18 FDE cie=0+ pc=0+\.\.0+8
+  DW_CFA_advance_loc: 4 to 0+4
   DW_CFA_GNU_window_save
-  DW_CFA_advance_loc: 4 to 0000000000000008
+  DW_CFA_advance_loc: 4 to 0+8
   DW_CFA_def_cfa_offset: 16
   DW_CFA_offset: r29 \(x29\) at cfa-16
   DW_CFA_offset: r30 \(x30\) at cfa-8
   DW_CFA_nop
   DW_CFA_nop
-
-
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0.d b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
index 9ba990e0d8..c5a7685b38 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
@@ -4,10 +4,10 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <.*>:
+0+ <.*>:
    0:	8a000000 	and	x0, x0, x0
    4:	92400000 	and	x0, x0, #0x1
    8:	d2800004 	mov	x4, #0x0                   	// #0
-			8: R_AARCH64_MOVW_PREL_G0	tempy
+			8: R_AARCH64_(P32_|)MOVW_PREL_G0	tempy
    c:	d2800011 	mov	x17, #0x0                   	// #0
-			c: R_AARCH64_MOVW_PREL_G0	tempy2
+			c: R_AARCH64_(P32_|)MOVW_PREL_G0	tempy2
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
index 4127ce7bbe..f7a29194be 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
@@ -4,12 +4,12 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <.*>:
+0+ <.*>:
    0:	8a000000 	and	x0, x0, x0
    4:	92400000 	and	x0, x0, #0x1
    8:	f2800004 	movk	x4, #0x0
-			8: R_AARCH64_MOVW_PREL_G0_NC	tempy
+			8: R_AARCH64_(P32_|)MOVW_PREL_G0_NC	tempy
    c:	f2800007 	movk	x7, #0x0
-			c: R_AARCH64_MOVW_PREL_G0_NC	tempy2
+			c: R_AARCH64_(P32_|)MOVW_PREL_G0_NC	tempy2
   10:	f2800011 	movk	x17, #0x0
-			10: R_AARCH64_MOVW_PREL_G0_NC	tempy3
+			10: R_AARCH64_(P32_|)MOVW_PREL_G0_NC	tempy3
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g1.d b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
index 1a161f8ea8..63c91e0d7e 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
@@ -4,10 +4,10 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <.*>:
+0+ <.*>:
    0:	8a000000 	and	x0, x0, x0
    4:	92400000 	and	x0, x0, #0x1
    8:	d2a00004 	movz	x4, #0x0, lsl #16
-			8: R_AARCH64_MOVW_PREL_G1	tempy
+			8: R_AARCH64_(P32_|)MOVW_PREL_G1	tempy
    c:	d2a00011 	movz	x17, #0x0, lsl #16
-			c: R_AARCH64_MOVW_PREL_G1	tempy2
+			c: R_AARCH64_(P32_|)MOVW_PREL_G1	tempy2
diff --git a/gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d b/gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d
index a7971586f7..4ba95b8950 100644
--- a/gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d
+++ b/gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d
@@ -6,7 +6,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	0420bc20 	movprfx	z0, z1
  *[0-9a-f]+:	64638040 	bfdot	z0\.s, z2\.h, z3\.h
  *[0-9a-f]+:	0420bc20 	movprfx	z0, z1
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx-mm.d b/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
index 197f69fae8..88415ef098 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
@@ -5,7 +5,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	0420bc11 	movprfx	z17, z0
  *[0-9a-f]+:	451b9ab1 	smmla	z17\.s, z21\.b, z27\.b
  *[0-9a-f]+:	0420bc11 	movprfx	z17, z0
diff --git a/gas/testsuite/gas/aarch64/sve2.d b/gas/testsuite/gas/aarch64/sve2.d
index f8be1c57c3..beb76b5ffe 100644
--- a/gas/testsuite/gas/aarch64/sve2.d
+++ b/gas/testsuite/gas/aarch64/sve2.d
@@ -6,7 +6,7 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <\.text>:
+0+ <\.text>:
  *[0-9a-f]+:	0420bc20 	movprfx	z0, z1
  *[0-9a-f]+:	4542d020 	adclb	z0\.d, z1\.d, z2\.d
  *[0-9a-f]+:	451bd2b1 	adclb	z17\.s, z21\.s, z27\.s


-- 
Alan Modra
Australia Development Lab, IBM
References:
- [PATCH][gas] Implement .cfi_negate_ra_state directive
  - From: Kyrill Tkachov
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