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Re: [PATCH RFC] Add support for non-contiguous memory regions


On Mon, 2 Dec 2019 at 12:05, Simon Richter <Simon.Richter@hogyros.de> wrote:
>
> Hi,
>
> On Mon, Dec 02, 2019 at 10:56:22AM +0100, Christophe Lyon wrote:
>
> > > > The attached patches implement support for non-contiguous memory
> > > > regions
>
> > > How does this interact with relaxations?
>
> > I haven't tested that specifically yet. Do you have a target /
> > testcase in mind that I could check?
>
> A quick testcase would be on PowerPC:
>
> Assembler file "test.S"
>
>                 .machine "ppc"
>
>                 .section .text.one
>                 b       2f
>
>                 .section .text.two
>         2:
>                 nop
>
> Linker script "test.ld"
>
>         MEMORY {
>                 one (RXAI) : ORIGIN = 0x00000000, LENGTH = 0x10000000
>                 two (RXAI) : ORIGIN = 0x20000000, LENGTH = 0x10000000
>         }
>
>         SECTIONS {
>                 one : {
>                         *(.text.one)
>                 } > one
>                 two : {
>                         *(.text.two)
>                 } > two
>         }
>
> Assemble:
>
>         $ as -o test.o test.S
>
> Disassemble:
>
>         $ objdump -dr test.o
>
>         test.o:     file format elf64-powerpcle
>
>
>         Disassembly of section .text.one:
>
>         0000000000000000 <.text.one>:
>            0:   00 00 00 48     b       0x0
>                                 0: R_PPC64_REL24        .text.two
>
>         Disassembly of section .text.two:
>
>         0000000000000000 <.text.two>:
>            0:   00 00 00 60     nop
>
> Link:
>
>         $ ld -o test -T test.ld --relax test.o
>
> Disassemble:
>
>         $ objdump -dr test
>
>         test:     file format elf64-powerpcle
>
>         Disassembly of section one:
>
>         0000000000000000 <0000001b.plt_branch.1c:5>:
>            0:   08 80 82 e9     ld      r12,-32760(r2)
>            4:   a6 03 89 7d     mtctr   r12
>            8:   20 04 80 4e     bctr
>                 ...
>           20:   e0 ff ff 4b     b       0 <0000001b.plt_branch.1c:5>
>
>         Disassembly of section two:
>
>         0000000020000000 <two>:
>             20000000:   00 00 00 60     nop
>
> The linker generates the trampoline as the branch displacement doesn't fit
> the instruction, extending the section size by 12 bytes. This happens after
> addresses are assigned, because that is when the linker learns that the
> displacement is too large.
>
> There is also the opposite case, where branch instructions are replaced by
> shorter variants on some architectures during relaxation, but I don't have
> an example immediately ready.
>
> The desired behaviour for the combination of non-contiguous regions and
> relaxations should probably be defined by someone from the core team --
> probably locking out the combination (like "-r --relax" on PowerPC) or just
> ensuring that it doesn't crash is the sanest thing to do here.
>

Whether the new option is enabled or not, my patch has no impact on
your testcase, because the memory regions are large enough to contain
all the code.

If I modify your linker script to reduce the length of memory region
"one" to 0x10, the testcase fails to link (as expected) with:
a.out section `one' will not fit in region `one'

If I use --enable-non-contiguous-regions, link succeeds, the "one"
section is silently discarded from the output (and no trampoline
either).

This is not a user-friendly behaviour :-) I'm checking how to keep the
proper error message instead.


>    Simon


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