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Re: [PATCH] x86: Enable Intel AVX512 VP2INTERSECT instruction


>>> On 03.06.19 at 17:10, <hjl.tools@gmail.com> wrote:
> On Mon, Jun 3, 2019 at 12:34 AM Jan Beulich <JBeulich@suse.com> wrote:
>>
>> >>> On 31.05.19 at 18:38, <hjl.tools@gmail.com> wrote:
>> > On Fri, May 31, 2019 at 4:45 AM Jan Beulich <JBeulich@suse.com> wrote:
>> >>
>> >> >>> On 31.05.19 at 09:05, <lili.cui@intel.com> wrote:
>> >> > gas/
>> >> >
>> >> > 2019-05-27  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
>> >> >           Lili Cui  <lili.cui@intel.com>
>> >> >
>> >> >       * config/tc-i386.c (cpu_arch): Add .avx512_vp2intersect.
>> >> >       (cpu_noarch): Likewise.
>> >>
>> >> I think there's code missing here: Just like for 4FMAPS and 4VNNIW
>> >> insns we warn when the programmer has specified a register not
>> >> evenly divisible by 4 (see the ImplicitQuadGroup attribute), you want
>> >> to warn here for an odd-numbered mask register. However, rather
>> >> than taking the easy route by simply adding another boolean, please
>> >> consider converting the existing one to an enum-like attribute, and
>> >> simply add another enumerator for the case here. Or quite possibly
>> >> a renamed boolean attribute could do - both cases can be easily
>> >> distinguished by there being a %k register affected here, but
>> >> %[xyz]mm ones there.
>> >
>> > vp2intersectd %zmm1, %zmm2, %k0
>> > vp2intersectd %zmm1, %zmm2, %k1
>> >
>> > are well defined by
>> >
>> > // dest_mask_reg_id is the register id specified in the instruction for
>> > destmask
>> > dest_base ← dest_mask_reg_id & ~1
>> >
>> > There is no requirement for even mask registers.
>>
>> But similarly there is
>>
>> src_base ← src_reg_id & ~3 // for src1 operand
>>
>> for the 4FMAPS instructions, and
>>
>> src_base ← src_reg_id & ~ (N-1) // for src1 operand
>>
>> for the 4VNNIW ones, and these get warned about. Let's be consistent
>> with such warnings.
>>
> 
> Given that these register operands are well defined, I'd rather to remove
> these warnings for 4FMAPS and 4VNNIW.

Well, you're the maintainer, so I can't stop you, but I think these
warnings are worthwhile to have. I agree the behavior is well
defined, but I think using a "wrong" register is still potentially
confusing.

Jan


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