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[PATCH, BFD, AArch64] Improve bti/pac plts.
- From: Sudakshina Das <Sudi dot Das at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: nd <nd at arm dot com>, "nickc at redhat dot com" <nickc at redhat dot com>, Szabolcs Nagy <Szabolcs dot Nagy at arm dot com>, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Wed, 17 Apr 2019 17:23:14 +0000
- Subject: [PATCH, BFD, AArch64] Improve bti/pac plts.
Hi
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and
PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus
both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and
BTI plt0 instead, respectively.
* We can remove the extra padding nops when we add the new bti
instructions. BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI
pltn and PAC pltn are updated.
Since most of changes were suggested by Szabolcs, I have added him in cc.
Build and regression tested on aarch64-none-linux-gnu.
Is this ok for trunk?
Sudi
*** bfd/ChangeLog ***
2019-xx-xx Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-xx-xx Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 57a723d547734b4a4b5074fb7c90811e9bd56184..e82822ba6feffce649b6256667762ca7ed2ef44e 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -268,14 +268,10 @@
#define PLT_SMALL_ENTRY_SIZE (16)
#define PLT_TLSDESC_ENTRY_SIZE (32)
/* PLT sizes with BTI insn. */
-#define PLT_BTI_ENTRY_SIZE (36)
-#define PLT_BTI_SMALL_ENTRY_SIZE (20)
-#define PLT_BTI_TLSDESC_ENTRY_SIZE (36)
+#define PLT_BTI_SMALL_ENTRY_SIZE (24)
/* PLT sizes with PAC insn. */
-#define PLT_PAC_ENTRY_SIZE (36)
-#define PLT_PAC_SMALL_ENTRY_SIZE (20)
+#define PLT_PAC_SMALL_ENTRY_SIZE (24)
/* PLT sizes with BTI and PAC insn. */
-#define PLT_BTI_PAC_ENTRY_SIZE (40)
#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
/* Encoding of the nop instruction. */
@@ -307,7 +303,7 @@ static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
0x1f, 0x20, 0x03, 0xd5, /* nop */
};
-static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_BTI_ENTRY_SIZE] =
+static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
@@ -322,45 +318,6 @@ static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_BTI_ENTRY_SIZE] =
0x20, 0x02, 0x1f, 0xd6, /* br x17 */
0x1f, 0x20, 0x03, 0xd5, /* nop */
0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
-};
-
-static const bfd_byte elfNN_aarch64_small_plt0_pac_entry[PLT_PAC_ENTRY_SIZE] =
-{
- 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
- 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
-#if ARCH_SIZE == 64
- 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
- 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
-#else
- 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
- 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
-#endif
- 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
- 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
-};
-
-static const bfd_byte
-elfNN_aarch64_small_plt0_bti_pac_entry[PLT_BTI_PAC_ENTRY_SIZE] =
-{
- 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
- 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
- 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
-#if ARCH_SIZE == 64
- 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
- 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
-#else
- 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
- 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
-#endif
- 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
- 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
};
/* Per function entry in a procedure linkage table looks like this
@@ -392,6 +349,7 @@ elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
#endif
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
+ 0x1f, 0x20, 0x03, 0xd5, /* nop */
};
static const bfd_byte
@@ -407,6 +365,7 @@ elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
#endif
0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
+ 0x1f, 0x20, 0x03, 0xd5, /* nop */
};
static const bfd_byte
@@ -444,7 +403,7 @@ elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
};
static const bfd_byte
-elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_BTI_TLSDESC_ENTRY_SIZE] =
+elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
@@ -459,7 +418,6 @@ elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_BTI_TLSDESC_ENTRY_SIZE] =
#endif
0x40, 0x00, 0x1f, 0xd6, /* br x2 */
0x1f, 0x20, 0x03, 0xd5, /* nop */
- 0x1f, 0x20, 0x03, 0xd5, /* nop */
};
#define elf_info_to_howto elfNN_aarch64_info_to_howto
@@ -4758,9 +4716,7 @@ setup_plt_values (struct bfd_link_info *link_info,
if (plt_type == PLT_BTI_PAC)
{
- globals->plt_header_size = PLT_BTI_PAC_ENTRY_SIZE;
- globals->plt0_entry = elfNN_aarch64_small_plt0_bti_pac_entry;
- globals->tlsdesc_plt_entry_size = PLT_BTI_TLSDESC_ENTRY_SIZE;
+ globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
/* Only in ET_EXEC we need PLTn with BTI. */
if (bfd_link_pde (link_info))
@@ -4776,9 +4732,7 @@ setup_plt_values (struct bfd_link_info *link_info,
}
else if (plt_type == PLT_BTI)
{
- globals->plt_header_size = PLT_BTI_ENTRY_SIZE;
globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
- globals->tlsdesc_plt_entry_size = PLT_BTI_TLSDESC_ENTRY_SIZE;
/* Only in ET_EXEC we need PLTn with BTI. */
if (bfd_link_pde (link_info))
@@ -4789,9 +4743,6 @@ setup_plt_values (struct bfd_link_info *link_info,
}
else if (plt_type == PLT_PAC)
{
- globals->plt_header_size = PLT_PAC_ENTRY_SIZE;
- globals->plt0_entry = elfNN_aarch64_small_plt0_pac_entry;
- globals->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
}
@@ -9717,7 +9668,6 @@ elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
if (type == PLT_BTI || type == PLT_BTI_PAC)
{
entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
- htab->tlsdesc_plt_entry_size = PLT_BTI_TLSDESC_ENTRY_SIZE;
}
memcpy (htab->root.splt->contents + htab->tlsdesc_plt,
@@ -9893,7 +9843,6 @@ elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
{
- plt0_size = PLT_BTI_PAC_ENTRY_SIZE;
if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
else
@@ -9901,13 +9850,11 @@ elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
}
else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
{
- plt0_size = PLT_BTI_ENTRY_SIZE;
if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
}
else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
{
- plt0_size = PLT_PAC_ENTRY_SIZE;
pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
}
diff --git a/ld/testsuite/ld-aarch64/bti-pac-plt-1.d b/ld/testsuite/ld-aarch64/bti-pac-plt-1.d
index 8d780ca8a49ace7b0631a9239f3b7368d693b238..1ac280665e7c918bcf22853a21bd0a2ecae25d02 100644
--- a/ld/testsuite/ld-aarch64/bti-pac-plt-1.d
+++ b/ld/testsuite/ld-aarch64/bti-pac-plt-1.d
@@ -13,11 +13,9 @@ Disassembly of section \.plt:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
.*: f9400e11 ldr x17, \[x16, #24\]
.*: 91006210 add x16, x16, #0x18
-.*: d503219f autia1716
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
-.*: d503201f nop
[0-9a-f]+ <.*>:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
@@ -25,6 +23,7 @@ Disassembly of section \.plt:
.*: 91008210 add x16, x16, #0x20
.*: d503219f autia1716
.*: d61f0220 br x17
+.*: d503201f nop
[0-9a-f]+ <.*>:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
@@ -32,3 +31,4 @@ Disassembly of section \.plt:
.*: 9100a210 add x16, x16, #0x28
.*: d503219f autia1716
.*: d61f0220 br x17
+.*: d503201f nop
diff --git a/ld/testsuite/ld-aarch64/bti-pac-plt-2.d b/ld/testsuite/ld-aarch64/bti-pac-plt-2.d
index d1264ea000ad27c8623c4a348c0ec306f040f444..e0ac1df1a57e4389866655c25532d97583bbf28d 100644
--- a/ld/testsuite/ld-aarch64/bti-pac-plt-2.d
+++ b/ld/testsuite/ld-aarch64/bti-pac-plt-2.d
@@ -13,11 +13,9 @@ Disassembly of section \.plt:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
.*: f9400e11 ldr x17, \[x16, #24\]
.*: 91006210 add x16, x16, #0x18
-.*: d503219f autia1716
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
-.*: d503201f nop
[0-9]+ <.*>:
.*: d503245f bti c
diff --git a/ld/testsuite/ld-aarch64/bti-plt-1.d b/ld/testsuite/ld-aarch64/bti-plt-1.d
index b7b58a8844c7de594e0e4576d0d64cf2958fc329..618a6a9c15395bf786fd8c60f4569f97d78fcc13 100644
--- a/ld/testsuite/ld-aarch64/bti-plt-1.d
+++ b/ld/testsuite/ld-aarch64/bti-plt-1.d
@@ -17,7 +17,6 @@ Disassembly of section \.plt:
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
-.*: d503201f nop
[0-9]+ <.*>:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
diff --git a/ld/testsuite/ld-aarch64/bti-plt-3.d b/ld/testsuite/ld-aarch64/bti-plt-3.d
index 0d4c467db84b14402af4c043d911b42bfc8bb0e2..08914deb87526dd4e1699fb062a4486638d4c058 100644
--- a/ld/testsuite/ld-aarch64/bti-plt-3.d
+++ b/ld/testsuite/ld-aarch64/bti-plt-3.d
@@ -17,7 +17,6 @@ Disassembly of section \.plt:
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
-.*: d503201f nop
[0-9]+ <.*>:
.*: d503245f bti c
@@ -25,6 +24,7 @@ Disassembly of section \.plt:
.*: f9401211 ldr x17, \[x16, #32\]
.*: 91008210 add x16, x16, #0x20
.*: d61f0220 br x17
+.*: d503201f nop
[0-9]+ <.*>:
.*: d503245f bti c
@@ -32,3 +32,4 @@ Disassembly of section \.plt:
.*: f9401611 ldr x17, \[x16, #40\]
.*: 9100a210 add x16, x16, #0x28
.*: d61f0220 br x17
+.*: d503201f nop
diff --git a/ld/testsuite/ld-aarch64/bti-plt-5.d b/ld/testsuite/ld-aarch64/bti-plt-5.d
index 01231b69d2c4066d0fe3c49e359cef9b670ba34d..12abbc2e055b50ec2db0239e682551792952baa0 100644
--- a/ld/testsuite/ld-aarch64/bti-plt-5.d
+++ b/ld/testsuite/ld-aarch64/bti-plt-5.d
@@ -12,17 +12,17 @@ Disassembly of section \.plt:
[0-9a-f]+ <.*>:
.*: d503245f bti c
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
-.*: 90000090 adrp x16, 410000 <_start\+0xfd28>
+.*: 90000090 adrp x16, 410000 <.*>
.*: f9421611 ldr x17, \[x16, #1064\]
.*: 9110a210 add x16, x16, #0x428
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
-.*: d503201f nop
[0-9a-f]+ <.*>:
.*: d503245f bti c
-.*: 90000090 adrp x16, 410000 <_start\+0xfd28>
+.*: 90000090 adrp x16, 410000 <.*>
.*: f9421a11 ldr x17, \[x16, #1072\]
.*: 9110c210 add x16, x16, #0x430
.*: d61f0220 br x17
+.*: d503201f nop
diff --git a/ld/testsuite/ld-aarch64/pac-plt-1.d b/ld/testsuite/ld-aarch64/pac-plt-1.d
index 47be9491b6ab1f49c3f57a390671627e3c2a9eca..9c4a676cf8f68bec3815909b25e188e7194c82ed 100644
--- a/ld/testsuite/ld-aarch64/pac-plt-1.d
+++ b/ld/testsuite/ld-aarch64/pac-plt-1.d
@@ -12,7 +12,6 @@ Disassembly of section \.plt:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
.*: f9400e11 ldr x17, \[x16, #24\]
.*: 91006210 add x16, x16, #0x18
-.*: d503219f autia1716
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
@@ -24,6 +23,7 @@ Disassembly of section \.plt:
.*: 91008210 add x16, x16, #0x20
.*: d503219f autia1716
.*: d61f0220 br x17
+.*: d503201f nop
[0-9]+ <.*>:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
@@ -31,3 +31,4 @@ Disassembly of section \.plt:
.*: 9100a210 add x16, x16, #0x28
.*: d503219f autia1716
.*: d61f0220 br x17
+.*: d503201f nop
diff --git a/ld/testsuite/ld-aarch64/pac-plt-2.d b/ld/testsuite/ld-aarch64/pac-plt-2.d
index 42bfdca6218d191de846ce482f23b5f627e55034..7ebc81d7f7ddb3c18b3cc4cc330c3e62c60a5e3f 100644
--- a/ld/testsuite/ld-aarch64/pac-plt-2.d
+++ b/ld/testsuite/ld-aarch64/pac-plt-2.d
@@ -4,21 +4,21 @@
#...
Disassembly of section .plt:
-0000000000018000 \<.plt\>:
+.* \<.plt\>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
.*: f9401a11 ldr x17, \[x16, #48\]
.*: 9100c210 add x16, x16, #0x30
-.*: d503219f autia1716
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
.*: d503201f nop
-0000000000018024 \<__tls_get_addr@plt\>:
+.* \<__tls_get_addr@plt\>:
.*: 90000090 adrp x16, 28000 <_GLOBAL_OFFSET_TABLE_>
.*: f9401e11 ldr x17, \[x16, #56\]
.*: 9100e210 add x16, x16, #0x38
.*: d503219f autia1716
.*: d61f0220 br x17
+.*: d503201f nop