Re: rv64: bug in encoding of bge?

[Florian Weimer <fweimer at redhat dot com>]

* Jim Wilson:

> On 1/9/19 6:10 AM, Paulo Matos wrote:
>> 0000000000000000 <foo>:
>>     0:   00c5d063                bge     a1,a2,0 <foo>
>>     4:   feb65ee3                bge     a2,a1,0 <foo>
>>     8:   fec5fce3                bgeu    a1,a2,0 <foo>
>>     c:   feb67ae3                bgeu    a2,a1,0 <foo>
>>
>>
>> The first encoding looks fine but the first byte of the others (0xfe)
>> just don't look correct. For example, for the second instruction I would
>> have expected:
>>     4:   00b65063                bge a2,a1,0
>
> The upper bits hold part of the offset.  The first instruction
> branches to itself so the offset is 0.  The following branches go
> backwards to address 0, so the offset is negative.  That causes the
> upper 7 bits to all be 1.
>
> If you want a different view of disassembly, spike-dasm which is part
> of riscv-isa-sim does it a little differently, and can be used to
> confirm.
>
> gamma05:2030$ cat tmp.file
> DASM(feb65ee3)
> gamma05:2031$ build-install/bin/spike-dasm < tmp.file
> bge     a2, a1, pc - 4
> gamma05:2032$
>
> Please see the ISA manual for info about instruction encodings.

--reloc usually helps as well:

0000000000000000 <foo>:
   0:	00c5d063          	ble	a2,a1,0 <foo>
			0: R_RISCV_BRANCH	foo
   4:	feb65ee3          	ble	a1,a2,0 <foo>
			4: R_RISCV_BRANCH	foo
   8:	fec5fce3          	bleu	a2,a1,0 <foo>
			8: R_RISCV_BRANCH	foo
   c:	feb67ae3          	bleu	a1,a2,0 <foo>
			c: R_RISCV_BRANCH	foo

On many targets and for relocatable objects, parts of instructions
subject to relocation have garbage values in the instruction stream.

Thanks,
Florian