[PATCH, BINUTILS, AARCH64, 5/8] Add Tag getting instruction in Memory Tagging Extension

[Sudakshina Das <sudi dot das at arm dot com>]

Hi

This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
Memory Tagging Extension (MTE) is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch add support to the Tag Getting instruction from
MTE:
- LDG <Xt>, [<Xn|SP>, #<simm>]

where
<Xt> : Is the 64-bit destination GPR.
<Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
<simm> : Is the optional signed immediate offset, a multiple of 16
in the range of -4096 and 4080, defaulting to 0.

Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
Added tests.

Is this ok for trunk?

Thanks
Sudi

*** opcodes/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (QL_LDG): New.
	(aarch64_opcode_table): Add ldg.
	* aarch64-asm-2.c: Regenarated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

*** gas/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for ldg.
	* testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.

Attachment: patch5.tar.gz
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