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Re: [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers

From: Sudakshina Das <sudi dot das at arm dot com>
To: Jan Beulich <jbeulich at suse dot com>
Cc: nd at arm dot com, Ramana dot Radhakrishnan at arm dot com, Richard dot Earnshaw at arm dot com, nickc at redhat dot com, binutils at sourceware dot org
Date: Mon, 24 Sep 2018 18:20:59 +0100
Subject: Re: [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
References: <3deae8b5-ceeb-c41c-8b79-aea32205a4ba@arm.com> <5BA77AF4020000780013E0E5@prv1-mh.provo.novell.com>

Hi Jan

On 23/09/18 12:37, Jan Beulich wrote:

Sudakshina Das <sudi.das@arm.com> 09/19/18 4:30 PM >>>

--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3714,6 +3714,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
{ "id_dfr0_el1",      CPENC(3,0,C0,C1,2),    F_REG_READ }, /* RO */
{ "id_pfr0_el1",      CPENC(3,0,C0,C1,0),    F_REG_READ }, /* RO */
{ "id_pfr1_el1",      CPENC(3,0,C0,C1,1),    F_REG_READ }, /* RO */
+  { "id_pfr2_el1",      CPENC(3,0,C0,C3,4),    F_ARCHEXT },


Judging by the neighboring ones - isn't this new one supposed to have F_REG_READ set?


Ah yes. Thanks for noticing. I will send out a modified patch soon.

Thanks
Sudi

Jan

Follow-Ups:
- Re: [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
  - From: Jan Beulich

References:
- [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
  - From: Sudakshina Das
- Re: [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
  - From: Jan Beulich

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