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Re: [PATCH][AArch64][binutils] Fix encodings for by element instructions.
- From: Nick Clifton <nickc at redhat dot com>
- To: Tamar Christina <tamar dot christina at arm dot com>, binutils at sourceware dot org
- Cc: nd at arm dot com, Richard dot Earnshaw at arm dot com, marcus dot shawcroft at arm dot com
- Date: Thu, 28 Jun 2018 14:14:41 +0100
- Subject: Re: [PATCH][AArch64][binutils] Fix encodings for by element instructions.
- References: <20180627143557.GA19424@arm.com>
Hi Tamar,
> Ok for master?
Approved - please apply.
> and for backport to binutils-2.30?
No - but you can apply the patch to the new binutils-2_31-branch...
Cheers
Nick
> opcodes/
> 2018-06-27 Tamar Christina <tamar.christina@arm.com>
>
> PR binutils/23192
> * aarch64-asm-2.c: Regenerate.
> * aarch64-dis-2.c: Likewise.
> * aarch64-opc-2.c: Likewise.
> * aarch64-dis.c (aarch64_ext_reglane): Add AARCH64_OPND_Em16 constraint.
> * aarch64-opc.c (operand_general_constraint_met_p,
> aarch64_print_operand): Likewise.
> * aarch64-tbl.h (aarch64_opcode_table): Change Em to Em16 for smlal,
> smlal2, fmla, fmls, fmul, fmulx, sqrdmlah, sqrdlsh, fmlal, fmlsl,
> fmlal2, fmlsl2.
> (AARCH64_OPERANDS): Add Em2.
>
> gas/
> 2018-06-27 Tamar Christina <tamar.christina@arm.com>
>
> PR binutils/23192
> * config/tc-aarch64.c (process_omitted_operand, parse_operands): Add
> AARCH64_OPND_Em16
> * testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper
> 16 registers.
> * testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
> * testsuite/gas/aarch64/advsimd-compnum.s: Likewise.
> * testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
> * testsuite/gas/aarch64/sve.d: Likewise.
>
> include/
> 2018-06-27 Tamar Christina <tamar.christina@arm.com>
>
> PR binutils/23192
> *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
>