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[PATCH, objdump/ARM] Fix bxns mask

Bit 7 of BXNS is a fixed bit which distinguish it from BLXNS. Yet it is
not set in the disassembler entry mask. This patch fixes that.

ChangeLog entry is as follows:

*** opcodes/ChangeLog ***

2018-02-14  Thomas Preud'homme  <>

	* arm-dis.c (thumb_opcodes): Fix BXNS mask.

Testing: Ran testsuite for arm-none-eabi targets which does not show any
regression. In particular the following tests are still fine:
- ARMv8-M Baseline Security Extensions instructions
- ARMv8-M Mainline Security Extensions instructions (1)
- ARMv8-M Mainline with DSP instructions (Security Extensions 1)

Is this ok for master branch?

Best regards,

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 5efe0316222d077a61831c743593e96e2ff6d77e..afa9410b4f4b4bbcaba5d4a61bdf72c75487b969 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2530,7 +2530,7 @@ static const struct opcode16 thumb_opcodes[] =
   /* ARMv8-M Security Extensions instructions.  */
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4784, 0xff87, "blxns\t%3-6r"},
-  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff07, "bxns\t%3-6r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff87, "bxns\t%3-6r"},
   /* ARM V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xbf50, 0xffff, "sevl%c"},

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