Re: [PATCH] x86: Properly encode vmovd with 64-bit memeory

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Mon, Jan 8, 2018 at 3:35 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 08.01.18 at 12:22, <hjl.tools@gmail.com> wrote:
>> On Mon, Jan 8, 2018 at 3:14 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> On Mon, Jan 8, 2018 at 12:48 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>> On 08.01.18 at 02:18, <hongjiu.lu@intel.com> wrote:
>>>>> For historical reason, we allow movd/vmovd with 64-bit register and
>>>>> memeory operands.  But for vmovd, we failed to handle 64-bit memeory
>>>>> operand.  This has been gone unnoticed since AT&T syntax always treats
>>>>> memory operand as 32-bit memory.  This patch properly encodes vmovd
>>>>> with 64-bit memeory operands.
>>>>
>>>> Interesting coincidence - just over the weekend I've run into this
>>>> issue too. My intended solution is quite different, though: Since
>>>> VMOVD (other than MOVD) doesn't have a 64-bit operand variant
>>>> in either Intel's SDM nor AMD's PM, I'd rather remove memory
>>>> operand support from it:
>>>> - generate code was wrong so far, so anyone having used it would
>>>>   have run buggy code anyway,
>>>> - old gcc only ever uses the 64-bit variants with register operands.
>>>
>>> Works for me.  Can you submit a patch?
>
> Hopefully later this week.
>
>> If we do that, should we also remove MOVD with 64-bit memory?
>
> We can't, as even up-to-date AMD PM still specifies this name
> instead of MOVQ.

I consider it is a defect in AMD manual.

>> Otherwise, -msse2avx won't work on MOVD with 64-bit memory.
>
> Hmm, good point - perhaps the SSE2AVX pattern then needs the
> change that you've been doing, while the plain one could have its
> memory alternative removed?

If we can't remove MOVD with 64-bit memory, I will go with my patch.

-- 
H.J.