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Re: [PATCH v2] RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2
- From: Nick Clifton <nickc at redhat dot com>
- To: Palmer Dabbelt <palmer at dabbelt dot com>, binutils at sourceware dot org
- Cc: patches at groups dot riscv dot org, Andrew Waterman <andrew at sifive dot com>
- Date: Tue, 24 Oct 2017 09:53:58 +0100
- Subject: Re: [PATCH v2] RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2
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Hi Palmer, Hi Andrew,
> This matches the ISA specification. This also adds two tests: one to
> make sure the assembler rejects invalid 'c.lui's, and one to make sure
> we only relax valid 'c.lui's.
>
> bfd/ChangeLog
>
> 2017-10-23 Andrew Waterman <andrew@sifive.com>
>
> * elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui
> when rd is x0.
>
> include/ChangeLog
>
> 2017-10-23 Andrew Waterman <andrew@sifive.com>
>
> * opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the
> immediate 0.
>
> gas/ChangeLog
>
> 2017-10-23 Andrew Waterman <andrew@sifive.com>
>
> * testsuite/gas/riscv/c-lui-fail.d: New testcase.
> gas/testsuite/gas/riscv/c-lui-fail.l: Likewise.
> gas/testsuite/gas/riscv/c-lui-fail.s: Likewise.
> gas/testsuite/gas/riscv/riscv.exp: Likewise.
>
> ld/ChangeLog
>
> 2017-10-23 Andrew Waterman <andrew@sifive.com>
>
> * ld/testsuite/ld-riscv-elf/c-lui.d: New testcase.
> ld/testsuite/ld-riscv-elf/c-lui.s: Likewise.
> ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite.
Thanks very much for making the changes. Patch approved - please apply.
Cheers
Nick