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[PATCH] RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2
- From: Palmer Dabbelt <palmer at dabbelt dot com>
- To: binutils at sourceware dot org
- Cc: patches at groups dot riscv dot org, Andrew Waterman <andrew at sifive dot com>
- Date: Fri, 20 Oct 2017 16:05:58 -0700
- Subject: [PATCH] RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2
- Authentication-results: sourceware.org; auth=none
From: Andrew Waterman <andrew@sifive.com>
This matches the ISA specification.
bfd/ChangeLog
2017-10-20 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui
when rd is x0.
include/ChangeLog
2017-10-20 Andrew Waterman <andrew@sifive.com>
* opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the
immediate 0.
---
bfd/elfnn-riscv.c | 5 +++--
include/opcode/riscv.h | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index f7cdb4e2b0f9..0c92798d3562 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -2988,9 +2988,10 @@ _bfd_riscv_relax_lui (bfd *abfd,
&& VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
&& VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval + ELF_MAXPAGESIZE)))
{
- /* Replace LUI with C.LUI if legal (i.e., rd != x2/sp). */
+ /* Replace LUI with C.LUI if legal (i.e., rd != x0 or x2/sp). */
bfd_vma lui = bfd_get_32 (abfd, contents + rel->r_offset);
- if (((lui >> OP_SH_RD) & OP_MASK_RD) == X_SP)
+ unsigned rd = ((unsigned)lui >> OP_SH_RD) & OP_MASK_RD;
+ if (rd == 0 || rd == X_SP)
return TRUE;
lui = (lui & (OP_MASK_RD << OP_SH_RD)) | MATCH_C_LUI;
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 719565d1ba53..015e78131495 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -141,7 +141,7 @@ static const char * const riscv_pred_succ[16] =
#define VALID_UTYPE_IMM(x) (EXTRACT_UTYPE_IMM(ENCODE_UTYPE_IMM(x)) == (x))
#define VALID_UJTYPE_IMM(x) (EXTRACT_UJTYPE_IMM(ENCODE_UJTYPE_IMM(x)) == (x))
#define VALID_RVC_IMM(x) (EXTRACT_RVC_IMM(ENCODE_RVC_IMM(x)) == (x))
-#define VALID_RVC_LUI_IMM(x) (EXTRACT_RVC_LUI_IMM(ENCODE_RVC_LUI_IMM(x)) == (x))
+#define VALID_RVC_LUI_IMM(x) (ENCODE_RVC_LUI_IMM(x) != 0 && EXTRACT_RVC_LUI_IMM(ENCODE_RVC_LUI_IMM(x)) == (x))
#define VALID_RVC_SIMM3(x) (EXTRACT_RVC_SIMM3(ENCODE_RVC_SIMM3(x)) == (x))
#define VALID_RVC_ADDI4SPN_IMM(x) (EXTRACT_RVC_ADDI4SPN_IMM(ENCODE_RVC_ADDI4SPN_IMM(x)) == (x))
#define VALID_RVC_ADDI16SP_IMM(x) (EXTRACT_RVC_ADDI16SP_IMM(ENCODE_RVC_ADDI16SP_IMM(x)) == (x))
--
2.13.6