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Re: VLE load/store multiple instructions
- From: Alexander Fedotov <alfedotov at gmail dot com>
- To: Alan Modra <amodra at gmail dot com>, binutils at sourceware dot org
- Date: Fri, 29 Sep 2017 23:46:46 +0300
- Subject: Re: VLE load/store multiple instructions
- Authentication-results: sourceware.org; auth=none
- References: <CAN8C2CoDGGaHJa5=G-g_oe9hSX96Grk5_--uLfguDr7iZxxY4A@mail.gmail.com> <20170927040003.GD25070@bubble.grove.modra.org>
Hello Alan
Please here is patch for load multiple instructions. I've decided to
add them as aliases because somebody can use original ones.
Alex
On Wed, Sep 27, 2017 at 7:00 AM, Alan Modra <amodra@gmail.com> wrote:
> On Tue, Sep 26, 2017 at 10:23:34PM +0300, Alexander Fedotov wrote:
>> Hello
>>
>> There is a bunch of New VLE Instructions for Improving Interrupt
>> Handler Efficiency which are described in
>> https://www.nxp.com/docs/en/engineering-bulletin/EB696.pdf. And
>> problem is that this document has 2 writings of multiple load
>> instructions:
>>
>> e_ldmvgprw vs e_lmvgprw
>>
>>
>> Also here is another document
>> https://www.nxp.com/docs/en/reference-manual/e200z760RM.pdf which
>> describes the same instructions but only e_lm*.
>>
>> In current PPC opcodes we have only e_ldm*. But it seems that a lot of
>> developers uses e_lm* in their software and it fails with GAS. Other
>> compilers also recognizes only e_lm*.
>>
>> What do you think about it ? Is it better to fix current names or add aliases ?
>
> Either way is fine with me. It really depends on how many people
> currently use the the e_ldm* versions. You know your users better
> than I do.
>
> --
> Alan Modra
> Australia Development Lab, IBM
--
Best regards,
AF
From 692e64fad80b7d3a926c595562971d5d5ba238df Mon Sep 17 00:00:00 2001
From: Alexander Fedotov <alfedotov@gmail.com>
Date: Fri, 29 Sep 2017 23:36:33 +0300
Subject: [PATCH] add aliases VLE load multiple instructions
---
gas/testsuite/gas/ppc/ppc.exp | 1 +
gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d | 26 ++++++++++++++++++++++++
gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s | 30 ++++++++++++++++++++++++++++
opcodes/ppc-opc.c | 5 +++++
4 files changed, 62 insertions(+)
create mode 100644 gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d
create mode 100644 gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index cdcd8a1..b12fbd3 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -60,6 +60,7 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "vle-simple-4"
run_dump_test "vle-simple-5"
run_dump_test "vle-simple-6"
+ run_dump_test "vle-mult-ld-st-insns"
#fail expected until get_powerpc_dialect() patch not applied
setup_xfail "*-*-*"
diff --git a/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d
new file mode 100644
index 0000000..f7eaea3
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d
@@ -0,0 +1,26 @@
+#as: -a32 -mvle -mregnames
+#objdump: -dr -Mvle
+#name: VLE Instructions for improving interrupt handler efficiency
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+00000000 <prolog>:
+ 0: 18 81 11 00 e_stmvsrrw 0\(r1\)
+ 4: 18 22 11 04 e_stmvsprw 4\(r2\)
+ 8: 18 03 11 08 e_stmvgprw 8\(r3\)
+ c: 18 a4 11 0c e_stmvcsrrw 12\(r4\)
+ 10: 18 c5 11 10 e_stmvdsrrw 16\(r5\)
+00000014 <epilog>:
+ 14: 18 26 10 14 e_ldmvsprw 20\(r6\)
+ 18: 18 07 10 18 e_ldmvgprw 24\(r7\)
+ 1c: 18 88 10 1c e_ldmvsrrw 28\(r8\)
+ 20: 18 a9 10 20 e_ldmvcsrrw 32\(r9\)
+ 24: 18 ca 10 24 e_ldmvdsrrw 36\(r10\)
+00000028 <epilog_alt>:
+ 28: 18 2b 10 28 e_ldmvsprw 40\(r11\)
+ 2c: 18 0c 10 2c e_ldmvgprw 44\(r12\)
+ 30: 18 8d 10 30 e_ldmvsrrw 48\(r13\)
+ 34: 18 ae 10 34 e_ldmvcsrrw 52\(r14\)
+ 38: 18 cf 10 38 e_ldmvdsrrw 56\(r15\)
\ No newline at end of file
diff --git a/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s
new file mode 100644
index 0000000..b635e32
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s
@@ -0,0 +1,30 @@
+# New VLE Instructions for Improving Interrupt Handler Efficiency (EB696.pdf)
+
+# e_lmvgprw, e_stmvgprw - load/store multiple volatile GPRs (r0, r3:r12)
+# e_lmvsprw, e_stmvsprw - load/store multiple volatile SPRs (CR, LR, CTR, and XER)
+# e_lmvsrrw, e_stmvsrrw - load/store multiple volatile SRRs (SRR0, SRR1)
+# e_lmvcsrrw, e_stmvcsrrw - load/store multiple volatile CSRRs (CSRR0, CSRR1)
+# e_lmvdsrrw, e_stmvdsrrw - load/store multiple volatile DSRRs (DSRR0, DSRR1)
+# e_lmvmcsrrw, e_stmvmcsrrw - load/store multiple volatile MCSRRs (MCSRR0, MCSRR1)
+
+ .text
+prolog:
+ e_stmvsrrw 0x00 (r1)
+ e_stmvsprw 0x04 (r2)
+ e_stmvgprw 0x08 (r3)
+ e_stmvcsrrw 0x0c (r4)
+ e_stmvdsrrw 0x10 (r5)
+
+epilog:
+ e_ldmvsprw 0x14 (r6)
+ e_ldmvgprw 0x18 (r7)
+ e_ldmvsrrw 0x1c (r8)
+ e_ldmvcsrrw 0x20 (r9)
+ e_ldmvdsrrw 0x24 (r10)
+
+epilog_alt:
+ e_lmvsprw 0x28 (r11)
+ e_lmvgprw 0x2c (r12)
+ e_lmvsrrw 0x30 (r13)
+ e_lmvcsrrw 0x34 (r14)
+ e_lmvdsrrw 0x38 (r15)
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 5edb1ad..6de277a 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -8316,14 +8316,19 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_stwu", OPVUP(6,6), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
{"e_stmw", OPVUP(6,9), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
{"e_ldmvgprw", OPVUPRT(6,16,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
+{"e_lmvgprw", OPVUPRT(6,16,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvgprw", OPVUPRT(6,17,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_ldmvsprw", OPVUPRT(6,16,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
+{"e_lmvsprw", OPVUPRT(6,16,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvsprw", OPVUPRT(6,17,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_ldmvsrrw", OPVUPRT(6,16,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
+{"e_lmvsrrw", OPVUPRT(6,16,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvsrrw", OPVUPRT(6,17,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_ldmvcsrrw", OPVUPRT(6,16,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
+{"e_lmvcsrrw", OPVUPRT(6,16,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvcsrrw", OPVUPRT(6,17,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_ldmvdsrrw", OPVUPRT(6,16,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
+{"e_lmvdsrrw", OPVUPRT(6,16,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvdsrrw", OPVUPRT(6,17,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}},
{"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
--
2.7.4