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[committed 0/3] MIPS: XPA fixes, microMIPS R5 addition, microMIPS XPA addition
- From: "Maciej W. Rozycki" <macro at imgtec dot com>
- To: <binutils at sourceware dot org>
- Cc: Andrew Bennett <Andrew dot Bennett at imgtec dot com>
- Date: Fri, 30 Jun 2017 07:23:26 +0100
- Subject: [committed 0/3] MIPS: XPA fixes, microMIPS R5 addition, microMIPS XPA addition
- Authentication-results: sourceware.org; auth=none
Hi,
This is a follow-up to the "Add XPA ASE and MIPS R5 microMIPS support"
submission thread of discussion started with
<https://sourceware.org/ml/binutils/2015-03/msg00059.html>. Andrew has
since moved on to other projects, so I have taken the latest version of
his patch from <https://sourceware.org/ml/binutils/2015-03/msg00257.html>
and completed this effort.
As Andrew's patch combined three independent changes, I have decided to
properly split it into three patches and apply separately. Consequently
this patch series consists of:
1. Support for a combined XPA/VZ ASE flag, fixing an assembly/disassembly
bug for the regular MIPS XPA base and Virtualization ASE instructions.
2. Support for the base microMIPS R5 architecture, adding the ERETNC
instruction.
3. Support for the XPA feature with the microMIPS architecture, adding its
base and Virtualization ASE instructions.
See individual descriptions for further details.
These have been verified with the usual MIPS targets and I have applied
them now.
Maciej