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Re: [PATCH] RISC-V: Allow 32-bit BFD to handle 64-bit objects
- From: Palmer Dabbelt <palmer at dabbelt dot com>
- To: amodra at gmail dot com
- Cc: binutils at sourceware dot org
- Cc: patches at groups dot riscv dot org
- Date: Tue, 02 May 2017 15:20:26 -0700 (PDT)
- Subject: Re: [PATCH] RISC-V: Allow 32-bit BFD to handle 64-bit objects
- Authentication-results: sourceware.org; auth=none
On Mon, 01 May 2017 18:31:44 PDT (-0700), amodra@gmail.com wrote:
> On Mon, May 01, 2017 at 01:33:03PM -0700, Palmer Dabbelt wrote:
>> -#ifdef BFD64
>> riscv32-*-*)
>> targ_defvec=riscv_elf32_vec
>> - targ_selvecs="riscv_elf32_vec"
>> + targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
>> want64=true
>> ;;
>> -
>> riscv64-*-*)
>> targ_defvec=riscv_elf64_vec
>> targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
>> want64=true
>> ;;
>> -#endif
>
> Removing the #ifdef isn't correct. To see why, configure binutils
> with --enable-targets=all on a 32-bit host. OK without that change.
Thanks. Committed as
commit 763a5fa4f330d6d3859c94a69ba1fcab09330cf9
Author: Palmer Dabbelt <palmer@dabbelt.com>
Date: Mon May 1 10:26:32 2017 -0700
RISC-V: Allow 32-bit BFD to handle 64-bit objects
We've been telling people that the riscv32-* and riscv64-* toolchains
are exactly the same, but it turns out we were lying: the riscv32-* BFD
doesn't handle 64-bit objects. This fixes that difference, so the ports
are actually the same.
bfd/ChangeLog
2017-05-01 Palmer Dabbelt <palmer@dabbelt.com>
* config.bfd (riscv32-*): Enable rv64.
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index c62cf13..530ec1d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2017-05-01 Palmer Dabbelt <palmer@dabbelt.com>
+
+ * config.bfd (riscv32-*): Enable rv64.
+
2017-05-02 Alan Modra <amodra@gmail.com>
PR 21384
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 151de95..eb6a958 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1441,10 +1441,9 @@ case "${targ}" in
#ifdef BFD64
riscv32-*-*)
targ_defvec=riscv_elf32_vec
- targ_selvecs="riscv_elf32_vec"
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
want64=true
;;
-
riscv64-*-*)
targ_defvec=riscv_elf64_vec
targ_selvecs="riscv_elf32_vec riscv_elf64_vec"