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Re: [ARM] Add ARMv8.3 VCMLA and VCADD instructions
- From: Szabolcs Nagy <szabolcs dot nagy at arm dot com>
- To: Jan Beulich <JBeulich at suse dot com>
- Cc: <nd at arm dot com>, Binutils <binutils at sourceware dot org>
- Date: Thu, 12 Jan 2017 12:00:58 +0000
- Subject: Re: [ARM] Add ARMv8.3 VCMLA and VCADD instructions
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On 12/01/17 09:49, Jan Beulich wrote:
>>>> On 05.12.16 at 13:59, <szabolcs.nagy@arm.com> wrote:
>> opcodes/
>> 2016-12-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
>>
>> * arm-dis.c (coprocessor_opcodes): Add vcmla and vcadd.
>> (print_insn_coprocessor): Add 'V' format for neon D or Q regs.
>
> This set of patterns
>
> + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
> + 0xfe000800, 0xfea00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10], #%20'90"},
> + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
> + 0xfe200800, 0xfea00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10], #%20?21%23?780"},
> + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
> + 0xfe800800, 0xfea00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0], #%20'90"},
> + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
> + 0xfea00800, 0xfea00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0], #%20?21%23?780"},
>
> suggests that bit 24 is not being decoded as part of the opcode,
> yet I also can't seem to figure an operand it affects. Should the
> masks perhaps have bit 24 set, or is it really ignored?
indeed the mask should be 0xffa00f10 for these instructions.
i'll prepare a patch.