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[committed] AArch64/opcodes: Correct another `index' global shadowing error
- From: "Maciej W. Rozycki" <macro at imgtec dot com>
- To: <binutils at sourceware dot org>
- Cc: Szabolcs Nagy <szabolcs dot nagy at arm dot com>
- Date: Thu, 8 Dec 2016 23:38:21 +0000
- Subject: [committed] AArch64/opcodes: Correct another `index' global shadowing error
- Authentication-results: sourceware.org; auth=none
Fix a commit c2c4ff8d52a2 ("[AArch64] Add ARMv8.3 FCMLA and FCADD
instructions") build regression:
cc1: warnings being treated as errors
.../opcodes/aarch64-dis.c: In function 'aarch64_ext_sve_addr_rr_lsl':
.../opcodes/aarch64-dis.c:1324: error: declaration of 'index' shadows a global declaration
/usr/include/string.h:303: error: shadowed declaration is here
make[4]: *** [aarch64-asm.lo] Error 1
in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
opcodes/
* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
variable to `reglane_index'.
---
binutils-aarch64-opcodes-reglane-index-fix.diff
Index: binutils/opcodes/aarch64-asm.c
===================================================================
--- binutils.orig/opcodes/aarch64-asm.c 2016-11-24 01:47:04.000000000 +0000
+++ binutils/opcodes/aarch64-asm.c 2016-12-08 06:52:26.643662499 +0000
@@ -125,28 +125,28 @@ aarch64_ins_reglane (const aarch64_opera
{
/* index for e.g. SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
or SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]. */
- unsigned index = info->reglane.index;
+ unsigned reglane_index = info->reglane.index;
if (inst->opcode->op == OP_FCMLA_ELEM)
/* Complex operand takes two elements. */
- index *= 2;
+ reglane_index *= 2;
switch (info->qualifier)
{
case AARCH64_OPND_QLF_S_H:
/* H:L:M */
- assert (index < 8);
- insert_fields (code, index, 0, 3, FLD_M, FLD_L, FLD_H);
+ assert (reglane_index < 8);
+ insert_fields (code, reglane_index, 0, 3, FLD_M, FLD_L, FLD_H);
break;
case AARCH64_OPND_QLF_S_S:
/* H:L */
- assert (index < 4);
- insert_fields (code, index, 0, 2, FLD_L, FLD_H);
+ assert (reglane_index < 4);
+ insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);
break;
case AARCH64_OPND_QLF_S_D:
/* H */
- assert (index < 2);
- insert_field (FLD_H, code, index, 0);
+ assert (reglane_index < 2);
+ insert_field (FLD_H, code, reglane_index, 0);
break;
default:
assert (0);