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[PATCH 3/4] [ARC] Implement NPS-400 BMU instructions
gas/ChangeLog:
* testsuite/gas/arc/nps400-8.s: New file.
* testsuite/gas/arc/nps400-8.d: New file.
include/ChangeLog:
* opcode/arc.h: Add BMU to insn_class_t enum.
opcodes/ChangeLog:
* arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table.
* arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands,
insert_nps_bd_num_buff and extract_nps_bd_num_buff functions.
---
gas/ChangeLog | 5 ++++
gas/testsuite/gas/arc/nps400-8.d | 52 ++++++++++++++++++++++++++++++++
gas/testsuite/gas/arc/nps400-8.s | 59 ++++++++++++++++++++++++++++++++++++
include/ChangeLog | 4 +++
include/opcode/arc.h | 1 +
opcodes/ChangeLog | 6 ++++
opcodes/arc-nps400-tbl.h | 65 ++++++++++++++++++++++++++++++++++++++++
opcodes/arc-opc.c | 7 +++++
8 files changed, 199 insertions(+)
create mode 100644 gas/testsuite/gas/arc/nps400-8.d
create mode 100644 gas/testsuite/gas/arc/nps400-8.s
diff --git a/gas/testsuite/gas/arc/nps400-8.d b/gas/testsuite/gas/arc/nps400-8.d
new file mode 100644
index 0000000..f93fd58
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-8.d
@@ -0,0 +1,52 @@
+#as: -mcpu=arc700 -mnps400
+#objdump: -dr
+
+.*: +file format .*arc.*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.*>:
+ 0: 3810 0000 bdalc r0,\[cm:r0\],r0,r0
+ 4: 3a10 00c1 bdalc r1,\[cm:r2\],r2,r3
+ 8: 3850 0840 bdalc r0,\[cm:r0\],r0,0,0x1
+ c: 3b50 0c42 bdalc r2,\[cm:r3\],r3,0x1,0x1
+ 10: 3c50 0c03 bdalc r3,\[cm:r4\],r4,0x1,0x8
+ 14: 3850 0040 sbdalc r0,r0,0
+ 18: 3c50 0443 sbdalc r3,r4,0x1
+ 1c: 3811 003e bdfre 0,\[cm:r0\],r0,r0
+ 20: 3911 00be bdfre 0,\[cm:r1\],r1,r2
+ 24: 3851 007e bdfre 0,\[cm:r0\],r0,0x1
+ 28: 3a51 003e bdfre 0,\[cm:r2\],r2,0x8
+ 2c: 3851 087e bdfre 0,\[cm:r0\],r0,0,0x1
+ 30: 3e51 083e bdfre 0,\[cm:r6\],r6,0,0x8
+ 34: 3851 0c7e bdfre 0,\[cm:r0\],r0,0x1,0x1
+ 38: 3e51 0c3e bdfre 0,\[cm:r6\],r6,0x1,0x8
+ 3c: 3817 003e sbdfre 0,r0,r0
+ 40: 3917 00be sbdfre 0,r1,r2
+ 44: 3818 003e bdbgt 0,r0,r0
+ 48: 3c18 01be bdbgt 0,r4,r6
+ 4c: 381c 0000 idxalc r0,\[cm:r0\],r0,r0
+ 50: 3a1c 00c1 idxalc r1,\[cm:r2\],r2,r3
+ 54: 3d5c 0884 idxalc r4,\[cm:r5\],r5,0x2
+ 58: 385c 0040 sidxalc r0,r0
+ 5c: 3a5c 0044 sidxalc r4,r2
+ 60: 381e 003e idxfre 0,\[cm:r0\],r0,r0
+ 64: 391e 00be idxfre 0,\[cm:r1\],r1,r2
+ 68: 385e 007e idxfre 0,\[cm:r0\],r0,0x1
+ 6c: 3a5e 003e idxfre 0,\[cm:r2\],r2,0x8
+ 70: 381d 003e sidxfre 0,r0,r0
+ 74: 391d 00be sidxfre 0,r1,r2
+ 78: 3819 003e idxbgt 0,r0,r0
+ 7c: 3f19 023e idxbgt 0,r7,r8
+ 80: 3e0d 703e 0000 0000 efabgt 0,0,r0
+ 88: 3e0d 70fe ffff ffff efabgt 0,0xffffffff,r3
+ 90: 380d 0fbe 0000 0000 efabgt 0,r0,0
+ 98: 3c0d 0fbe ffff ffff efabgt 0,r4,0xffffffff
+ a0: 380d 003e efabgt 0,r0,r0
+ a4: 3f0d 023e efabgt 0,r7,r8
+ a8: 3e0d 7000 0000 0000 efabgt r0,0,r0
+ b0: 3e0d 7184 ffff ffff efabgt r4,0xffffffff,r6
+ b8: 380d 0f80 0000 0000 efabgt r0,r0,0
+ c0: 3b0d 0f82 ffff ffff efabgt r2,r3,0xffffffff
+ c8: 380d 0000 efabgt r0,r0,r0
+ cc: 380d 1247 efabgt r7,r8,r9
diff --git a/gas/testsuite/gas/arc/nps400-8.s b/gas/testsuite/gas/arc/nps400-8.s
new file mode 100644
index 0000000..ad665fd
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-8.s
@@ -0,0 +1,59 @@
+ .text
+
+ ;; bdalc / sbdalc
+ bdalc r0,[cm:r0],r0,r0
+ bdalc r1,[cm:r2],r2,r3
+ bdalc r0,[cm:r0],r0,0,1
+ bdalc r2,[cm:r3],r3,1,1
+ bdalc r3,[cm:r4],r4,1,8
+ sbdalc r0, r0, 0
+ sbdalc r3, r4, 1
+
+ ;; bdfre / sbdfre
+ bdfre 0,[cm:r0],r0,r0
+ bdfre 0,[cm:r1],r1,r2
+ bdfre 0,[cm:r0],r0,1
+ bdfre 0,[cm:r2],r2,8
+ bdfre 0,[cm:r0],r0,0,1
+ bdfre 0,[cm:r6],r6,0,8
+ bdfre 0,[cm:r0],r0,1,1
+ bdfre 0,[cm:r6],r6,1,8
+ sbdfre 0, r0, r0
+ sbdfre 0, r1, r2
+
+ ;; bdbgt
+ bdbgt 0,r0,r0
+ bdbgt 0,r4,r6
+
+ ;; idxalc / sidxalc
+ idxalc r0,[cm:r0],r0,r0
+ idxalc r1,[cm:r2],r2,r3
+ idxalc r4,[cm:r5],r5,2
+ sidxalc r0,r0
+ sidxalc r4,r2
+
+ ;; idxfre / sidxfre
+ idxfre 0,[cm:r0],r0,r0
+ idxfre 0,[cm:r1],r1,r2
+ idxfre 0,[cm:r0],r0,1
+ idxfre 0,[cm:r2],r2,8
+ sidxfre 0, r0, r0
+ sidxfre 0, r1, r2
+
+ ;; idxbgt
+ idxbgt 0,r0,r0
+ idxbgt 0,r7,r8
+
+ ;; efabgt
+ efabgt 0,0x0,r0
+ efabgt 0,0xffffffff,r3
+ efabgt 0,r0,0x0
+ efabgt 0,r4,0xffffffff
+ efabgt 0,r0,r0
+ efabgt 0,r7,r8
+ efabgt r0,0x0,r0
+ efabgt r4,0xffffffff,r6
+ efabgt r0,r0,0x0
+ efabgt r2,r3,0xffffffff
+ efabgt r0,r0,r0
+ efabgt r7,r8,r9
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index f3fafe0..f5f3331 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -43,6 +43,7 @@ typedef enum
ARITH,
AUXREG,
BITOP,
+ BMU,
BRANCH,
CONTROL,
DPI,
diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h
index f3bd81b..4fc337e 100644
--- a/opcodes/arc-nps400-tbl.h
+++ b/opcodes/arc-nps400-tbl.h
@@ -552,3 +552,68 @@ XLDST_LIKE("xld", 0xa)
XLDST_LIKE("xstb", 0xc)
XLDST_LIKE("xstw", 0xd)
XLDST_LIKE("xst", 0xe)
+
+/* BMU Instructions. */
+
+/* sbdalc dst, src1, type */
+{ "sbdalc", 0x38500040, 0xf8ff09c0, ARC_OPCODE_ARC700, BMU, NPS400, { RA, RB, NPS_BD_TYPE }, { 0 }},
+
+/* bdalc dst, [cm:src1], src1, src2 */
+{ "bdalc", 0x38100000, 0xf8ff0000, ARC_OPCODE_ARC700, BMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* bdalc dst, [cm:src1], src1, type, num_buff */
+{ "bdalc", 0x38500800, 0xf8ff0800, ARC_OPCODE_ARC700, BMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_BD_TYPE, NPS_BMU_NUM }, { 0 }},
+
+/* sbdfre 0, src1, src2 */
+{ "sbdfre", 0x3817003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, RC }, { 0 }},
+
+/* bdfre 0, [cm:src1], src1, src2 */
+{ "bdfre", 0x3811003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* bdfre 0, [cm:src1], src1, type, num_buff */
+{ "bdfre", 0x3851083e, 0xf8ff083f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_BD_TYPE, NPS_BMU_NUM }, { 0 }},
+
+/* bdfre 0, [cm:src1], src1, num_buff */
+{ "bdfre", 0x3851003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_BMU_NUM }, { 0 }},
+
+/* bdbgt 0, src1, src2 */
+{ "bdbgt", 0x3818003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, RC }, { 0 }},
+
+/* sidxalc dst, src1 */
+{ "sidxalc", 0x385c0040, 0xf8ff0040, ARC_OPCODE_ARC700, BMU, NPS400, { RA, RB }, { 0 }},
+
+/* idxalc dst, [cm:src1], src1, src2 */
+{ "idxalc", 0x381c0000, 0xf8ff0000, ARC_OPCODE_ARC700, BMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* idxalc dst, [cm:src1], src1, num_idx */
+{ "idxalc", 0x385c0800, 0xf8ff0800, ARC_OPCODE_ARC700, BMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_BMU_NUM }, { 0 }},
+
+/* sidxfre 0, src1, src2 */
+{ "sidxfre", 0x381d003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, RC }, { 0 }},
+
+/* idxfre 0, [cm:src1], src1, src2 */
+{ "idxfre", 0x381e003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* idxfre 0, [cm:src1], src1, num_buff */
+{ "idxfre", 0x385e003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_BMU_NUM }, { 0 }},
+
+/* idxbgt 0, src1, src2 */
+{ "idxbgt", 0x3819003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, RC }, { 0 }},
+
+/* efabgt 0, limm, src2 */
+{ "efabgt", 0x3e0d703e, 0xfffff03f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, LIMM, RC }, { 0 }},
+
+/* efabgt 0, src1, limm */
+{ "efabgt", 0x380d0fbe, 0xf8ff80ff, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, LIMM }, { 0 }},
+
+/* efabgt 0, src1, src2 */
+{ "efabgt", 0x380d003e, 0xf8ff003f, ARC_OPCODE_ARC700, BMU, NPS400, { ZA, RB, RC }, { 0 }},
+
+/* efabgt dst, limm, src2 */
+{ "efabgt", 0x3e0d7000, 0xfffff000, ARC_OPCODE_ARC700, BMU, NPS400, { RA, LIMM, RC }, { 0 }},
+
+/* efabgt dst, src1, limm */
+{ "efabgt", 0x380d0f80, 0xf8ff0fc0, ARC_OPCODE_ARC700, BMU, NPS400, { RA, RB, LIMM }, { 0 }},
+
+/* efabgt dst, src1, src2 */
+{ "efabgt", 0x380d0000, 0xf8ff8000, ARC_OPCODE_ARC700, BMU, NPS400, { RA, RB, RC }, { 0 }},
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 111e01d..beba028 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1138,6 +1138,7 @@ MAKE_1BASED_INSERT_EXTRACT_FUNCS(field_size, 6, 8, 3)
MAKE_1BASED_INSERT_EXTRACT_FUNCS(shift_factor, 9, 8, 3)
MAKE_1BASED_INSERT_EXTRACT_FUNCS(bits_to_scramble, 12, 8, 3)
MAKE_1BASED_INSERT_EXTRACT_FUNCS(bdlen_max_len, 5, 256, 8)
+MAKE_1BASED_INSERT_EXTRACT_FUNCS(bd_num_buff, 6, 8, 3)
static unsigned
insert_nps_min_hofs (unsigned insn ATTRIBUTE_UNUSED,
@@ -2168,6 +2169,12 @@ const struct arc_operand arc_operands[] =
#define NPS_CXD (NPS_CXA + 1)
{ 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cxd, extract_nps_cxd },
+
+#define NPS_BD_TYPE (NPS_CXD + 1)
+ { 1, 10, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_BMU_NUM (NPS_BD_TYPE + 1)
+ { 3, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bd_num_buff, extract_nps_bd_num_buff },
};
const unsigned arc_num_operands = ARRAY_SIZE (arc_operands);
--
2.7.4