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[committed, PATCH] PR gas/20145: Improve x86 .noXXX directives
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: binutils at sourceware dot org
- Date: Fri, 27 May 2016 10:37:51 -0700
- Subject: [committed, PATCH] PR gas/20145: Improve x86 .noXXX directives
- Authentication-results: sourceware.org; auth=none
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Support defining CPU_XXX_FLAGS with other CPU_XXX_FLAGS. Update
CPU_XXX_FLAGS to enable more bits like x87 and SYSCALL. Don't enable
MMX when enabling SSE, AVX or AVX512. Don't disable AVX nor AVX512 when
disabling SSE. Don't disable AVX512 when disabling AVX. Disable F16C,
FMA, FMA4 and XOP when disabling AVX. Add 87, no287, no387, no687,
nosse2, nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2 directives
to x86 assembler.
TODO: Add more .noXXX, like .noavx512f, directives to x86 assembler.
gas/
PR gas/20145
* config/tc-i386.c (cpu_arch): Add 687.
(cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
nosse4.1, nosse4.2, nosse4 and noavx2.
(parse_real_register): Check cpuregmmx instead of cpummx for MMX
register. Check cpuregxmm instead of cpusse for XMM register.
Check cpuregymm instead of cpuavx for YMM register. Check
cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
* doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
* testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
* testsuite/gas/i386/arch-10.d (as): Likewise.
* testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
* testsuite/gas/i386/i386.exp: Pass mmx to assembler for
arch-10-3 and arch-10-4. Run no87-3, nosse-4, nosse-5, noavx-3
and noavx-4.
* testsuite/gas/i386/no87-3.l: New file.
* testsuite/gas/i386/no87-3.s: Likewise.
* testsuite/gas/i386/noavx-3.l: Likewise.
* testsuite/gas/i386/noavx-3.s: Likewise.
* testsuite/gas/i386/noavx-4.d: Likewise.
* testsuite/gas/i386/noavx-4.s: Likewise.
* testsuite/gas/i386/nosse-4.l: Likewise.
* testsuite/gas/i386/nosse-4.s: Likewise.
* testsuite/gas/i386/nosse-5.d: Likewise.
* testsuite/gas/i386/nosse-5.s: Likewise.
opcodes/
PR gas/20145
* i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS. Remove
CpuMMX from CPU_SSE_FLAGS. Remove AVX and AVX512 bits from
CPU_ANY_SSE_FLAGS. Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
CpuXSAVEC. Add CPU_AVX_FLAGS to CpuF16C. Remove CpuMMX from
CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS. Add CPU_ANY_287_FLAGS,
CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS. Enable CpuRegMMX
for MMX. Enable CpuRegXMM for SSE, AVX and AVX512. Enable
CpuRegYMM for AVX and AVX512VL, Enable CpuRegZMM and
CpuRegMask for AVX512.
(cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
and CpuRegMask.
(set_bitfield_from_cpu_flag_init): New function.
(set_bitfield): Remove const on f. Call
set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
* i386-opc.h (CpuRegMMX): New.
(CpuRegXMM): Likewise.
(CpuRegYMM): Likewise.
(CpuRegZMM): Likewise.
(CpuRegMask): Likewise.
(i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
and cpuregmask.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
---
gas/config/tc-i386.c | 25 +-
gas/doc/c-i386.texi | 13 +-
gas/testsuite/gas/i386/arch-10-prefetchw.d | 2 +-
gas/testsuite/gas/i386/arch-10.d | 2 +-
gas/testsuite/gas/i386/arch-11.s | 1 +
gas/testsuite/gas/i386/i386.exp | 9 +-
gas/testsuite/gas/i386/no87-3.l | 39 +
gas/testsuite/gas/i386/no87-3.s | 27 +
gas/testsuite/gas/i386/noavx-3.l | 70 +
gas/testsuite/gas/i386/noavx-3.s | 42 +
gas/testsuite/gas/i386/noavx-4.d | 25 +
gas/testsuite/gas/i386/noavx-4.s | 22 +
gas/testsuite/gas/i386/nosse-4.l | 80 +
gas/testsuite/gas/i386/nosse-4.s | 51 +
gas/testsuite/gas/i386/nosse-5.d | 28 +
gas/testsuite/gas/i386/nosse-5.s | 27 +
opcodes/i386-gen.c | 200 +-
opcodes/i386-init.h | 434 +-
opcodes/i386-opc.h | 15 +
opcodes/i386-tbl.h | 10402 +++++++++++++--------------
20 files changed, 6052 insertions(+), 5462 deletions(-)
create mode 100644 gas/testsuite/gas/i386/no87-3.l
create mode 100644 gas/testsuite/gas/i386/no87-3.s
create mode 100644 gas/testsuite/gas/i386/noavx-3.l
create mode 100644 gas/testsuite/gas/i386/noavx-3.s
create mode 100644 gas/testsuite/gas/i386/noavx-4.d
create mode 100644 gas/testsuite/gas/i386/noavx-4.s
create mode 100644 gas/testsuite/gas/i386/nosse-4.l
create mode 100644 gas/testsuite/gas/i386/nosse-4.s
create mode 100644 gas/testsuite/gas/i386/nosse-5.d
create mode 100644 gas/testsuite/gas/i386/nosse-5.s
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 8358740..b69130a 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -823,6 +823,8 @@ static const arch_entry cpu_arch[] =
CPU_287_FLAGS, 0 },
{ STRING_COMMA_LEN (".387"), PROCESSOR_UNKNOWN,
CPU_387_FLAGS, 0 },
+ { STRING_COMMA_LEN (".687"), PROCESSOR_UNKNOWN,
+ CPU_687_FLAGS, 0 },
{ STRING_COMMA_LEN (".mmx"), PROCESSOR_UNKNOWN,
CPU_MMX_FLAGS, 0 },
{ STRING_COMMA_LEN (".sse"), PROCESSOR_UNKNOWN,
@@ -972,9 +974,19 @@ static const arch_entry cpu_arch[] =
static const noarch_entry cpu_noarch[] =
{
{ STRING_COMMA_LEN ("no87"), CPU_ANY_X87_FLAGS },
+ { STRING_COMMA_LEN ("no287"), CPU_ANY_287_FLAGS },
+ { STRING_COMMA_LEN ("no387"), CPU_ANY_387_FLAGS },
+ { STRING_COMMA_LEN ("no687"), CPU_ANY_687_FLAGS },
{ STRING_COMMA_LEN ("nommx"), CPU_ANY_MMX_FLAGS },
{ STRING_COMMA_LEN ("nosse"), CPU_ANY_SSE_FLAGS },
+ { STRING_COMMA_LEN ("nosse2"), CPU_ANY_SSE2_FLAGS },
+ { STRING_COMMA_LEN ("nosse3"), CPU_ANY_SSE3_FLAGS },
+ { STRING_COMMA_LEN ("nossse3"), CPU_ANY_SSSE3_FLAGS },
+ { STRING_COMMA_LEN ("nosse4.1"), CPU_ANY_SSE4_1_FLAGS },
+ { STRING_COMMA_LEN ("nosse4.2"), CPU_ANY_SSE4_2_FLAGS },
+ { STRING_COMMA_LEN ("nosse4"), CPU_ANY_SSE4_1_FLAGS },
{ STRING_COMMA_LEN ("noavx"), CPU_ANY_AVX_FLAGS },
+ { STRING_COMMA_LEN ("noavx2"), CPU_ANY_AVX2_FLAGS },
};
#ifdef I386COFF
@@ -9537,17 +9549,20 @@ parse_real_register (char *reg_string, char **end_op)
&& !cpu_arch_flags.bitfield.cpu387)
return (const reg_entry *) NULL;
- if (r->reg_type.bitfield.regmmx && !cpu_arch_flags.bitfield.cpummx)
+ if (r->reg_type.bitfield.regmmx && !cpu_arch_flags.bitfield.cpuregmmx)
return (const reg_entry *) NULL;
- if (r->reg_type.bitfield.regxmm && !cpu_arch_flags.bitfield.cpusse)
+ if (r->reg_type.bitfield.regxmm && !cpu_arch_flags.bitfield.cpuregxmm)
return (const reg_entry *) NULL;
- if (r->reg_type.bitfield.regymm && !cpu_arch_flags.bitfield.cpuavx)
+ if (r->reg_type.bitfield.regymm && !cpu_arch_flags.bitfield.cpuregymm)
return (const reg_entry *) NULL;
- if ((r->reg_type.bitfield.regzmm || r->reg_type.bitfield.regmask)
- && !cpu_arch_flags.bitfield.cpuavx512f)
+ if (r->reg_type.bitfield.regzmm && !cpu_arch_flags.bitfield.cpuregzmm)
+ return (const reg_entry *) NULL;
+
+ if (r->reg_type.bitfield.regmask
+ && !cpu_arch_flags.bitfield.cpuregmask)
return (const reg_entry *) NULL;
/* Don't allow fake index register unless allow_index_reg isn't 0. */
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index edd187b..696cadf 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -134,7 +134,11 @@ accept various extension mnemonics. For example,
@code{8087},
@code{287},
@code{387},
+@code{687},
@code{no87},
+@code{no287},
+@code{no387},
+@code{no687},
@code{mmx},
@code{nommx},
@code{sse},
@@ -145,8 +149,16 @@ accept various extension mnemonics. For example,
@code{sse4.2},
@code{sse4},
@code{nosse},
+@code{nosse2},
+@code{nosse3},
+@code{nossse3},
+@code{nosse4.1},
+@code{nosse4.2},
+@code{nosse4},
@code{avx},
@code{avx2},
+@code{noavx},
+@code{noavx2},
@code{adx},
@code{rdseed},
@code{prfchw},
@@ -168,7 +180,6 @@ accept various extension mnemonics. For example,
@code{avx512dq},
@code{avx512ifma},
@code{avx512vbmi},
-@code{noavx},
@code{vmx},
@code{vmfunc},
@code{smx},
diff --git a/gas/testsuite/gas/i386/arch-10-prefetchw.d b/gas/testsuite/gas/i386/arch-10-prefetchw.d
index 1129edf..8c88d94 100644
--- a/gas/testsuite/gas/i386/arch-10-prefetchw.d
+++ b/gas/testsuite/gas/i386/arch-10-prefetchw.d
@@ -1,5 +1,5 @@
#source: arch-10.s
-#as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
+#as: -march=i686+mmx+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
#objdump: -dw
#name: i386 arch 10 (prefetchw)
diff --git a/gas/testsuite/gas/i386/arch-10.d b/gas/testsuite/gas/i386/arch-10.d
index 3e2a7f1..52ea90a 100644
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -1,4 +1,4 @@
-#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
+#as: -march=i686+mmx+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
#objdump: -dw
#name: i386 arch 10
diff --git a/gas/testsuite/gas/i386/arch-11.s b/gas/testsuite/gas/i386/arch-11.s
index 0ecbe1c..0e514a4 100644
--- a/gas/testsuite/gas/i386/arch-11.s
+++ b/gas/testsuite/gas/i386/arch-11.s
@@ -1,5 +1,6 @@
# Test .arch .sse
.arch generic32
.arch .sse
+.arch .mmx
divss %xmm1,%xmm0
pminub %mm1,%mm0
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 624674d..0c22498 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -155,8 +155,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al"
- run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al"
- run_list_test "arch-10-4" "-march=i686+sse4+vmx+smx -I${srcdir}/$subdir -al"
+ run_list_test "arch-10-3" "-march=i686+mmx+sse4.2 -I${srcdir}/$subdir -al"
+ run_list_test "arch-10-4" "-march=i686+mmx+sse4+vmx+smx -I${srcdir}/$subdir -al"
run_dump_test "arch-11"
run_dump_test "arch-12"
run_dump_test "arch-13"
@@ -165,14 +165,19 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "387"
run_list_test "no87" "-al"
run_list_test "no87-2" "-march=i686+no87 -al"
+ run_list_test "no87-3" "-al"
run_list_test "nommx-1" "-al"
run_list_test "nommx-2" "-march=core+nommx -al"
run_list_test "nommx-3" "-march=+nommx -al"
run_list_test "nosse-1" "-al"
run_list_test "nosse-2" "-march=core+nosse -al"
run_list_test "nosse-3" "-march=+nosse -al"
+ run_list_test "nosse-4" "-al"
+ run_dump_test "nosse-5"
run_list_test "noavx-1" "-al"
run_list_test "noavx-2" "-march=+noavx -al"
+ run_list_test "noavx-3" "-al"
+ run_dump_test "noavx-4"
run_dump_test "xsave"
run_dump_test "xsave-intel"
run_dump_test "aes"
diff --git a/gas/testsuite/gas/i386/no87-3.l b/gas/testsuite/gas/i386/no87-3.l
new file mode 100644
index 0000000..d6edd14
--- /dev/null
+++ b/gas/testsuite/gas/i386/no87-3.l
@@ -0,0 +1,39 @@
+.*: Assembler messages:
+.*:4: Error: .*generic.*
+.*:7: Error: .*8087.*
+.*:10: Error: .*287.*
+.*:13: Error: .*387.*
+.*:17: Error: .*no687.*
+.*:20: Error: .*no387.*
+.*:23: Error: .*no287.*
+.*:26: Error: .*no87.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\# Test \.arch \[\.x87|\.nox87\]
+[ ]*2[ ]+\.text
+[ ]*3[ ]+\.arch generic32
+[ ]*4[ ]+fneni
+[ ]*5[ ]+\.arch \.8087
+[ ]*6[ ]+\?\?\?\? DBE0 fneni
+[ ]*7[ ]+fsetpm
+[ ]*8[ ]+\.arch \.287
+[ ]*9[ ]+\?\?\?\? 9BDBE4 fsetpm
+[ ]*10[ ]+fprem1
+[ ]*11[ ]+\.arch \.387
+[ ]*12[ ]+\?\?\?\? D9F5 fprem1
+[ ]*13[ ]+fcomi
+[ ]*14[ ]+\.arch \.687
+[ ]*15[ ]+\?\?\?\? DBF1 fcomi
+[ ]*16[ ]+\.arch \.no687
+[ ]*17[ ]+fcomi
+[ ]*18[ ]+\?\?\?\? D9F5 fprem1
+[ ]*19[ ]+\.arch \.no387
+[ ]*20[ ]+fprem1
+[ ]*21[ ]+\?\?\?\? 9BDBE4 fsetpm
+[ ]*22[ ]+\.arch \.no287
+[ ]*23[ ]+fsetpm
+[ ]*24[ ]+\?\?\?\? DBE0 fneni
+[ ]*25[ ]+\.arch \.no87
+[ ]*26[ ]+fneni
+[ ]*27[ ]+\.p2align 4
+#pass
diff --git a/gas/testsuite/gas/i386/no87-3.s b/gas/testsuite/gas/i386/no87-3.s
new file mode 100644
index 0000000..dbd4309
--- /dev/null
+++ b/gas/testsuite/gas/i386/no87-3.s
@@ -0,0 +1,27 @@
+# Test .arch [.x87|.nox87]
+ .text
+ .arch generic32
+ fneni
+ .arch .8087
+ fneni
+ fsetpm
+ .arch .287
+ fsetpm
+ fprem1
+ .arch .387
+ fprem1
+ fcomi
+ .arch .687
+ fcomi
+ .arch .no687
+ fcomi
+ fprem1
+ .arch .no387
+ fprem1
+ fsetpm
+ .arch .no287
+ fsetpm
+ fneni
+ .arch .no87
+ fneni
+ .p2align 4
diff --git a/gas/testsuite/gas/i386/noavx-3.l b/gas/testsuite/gas/i386/noavx-3.l
new file mode 100644
index 0000000..7215d7c
--- /dev/null
+++ b/gas/testsuite/gas/i386/noavx-3.l
@@ -0,0 +1,70 @@
+.*: Assembler messages:
+.*:4: Error: .*generic.*
+.*:5: Error: .*generic.*
+.*:6: Error: .*generic.*
+.*:7: Error: .*generic.*
+.*:12: Error: .*generic.*
+.*:15: Error: .*avx.*
+.*:32: Error: .*noavx2.*
+.*:35: Error: .*noavx.*
+.*:36: Error: .*noavx.*
+.*:37: Error: .*noavx.*
+.*:38: Error: .*noavx.*
+.*:39: Error: .*noavx.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\# Test \.arch \[\.avxX|\.noavxX\]
+[ ]*2[ ]+\.text
+[ ]*3[ ]+\.arch generic32
+[ ]*4[ ]+vcvtph2ps %xmm4,%ymm4
+[ ]*5[ ]+vfmadd132pd %ymm4,%ymm6,%ymm2
+[ ]*6[ ]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ ]*7[ ]+vfrczpd %xmm7,%xmm7
+[ ]*8[ ]+\.arch \.mmx
+[ ]*9[ ]+\.arch \.sse2
+[ ]*10[ ]+\?\?\?\? 0F77 emms
+[ ]*11[ ]+\?\?\?\? 0FAEE8 lfence
+[ ]*12[ ]+vzeroupper
+[ ]*13[ ]+\.arch \.avx
+[ ]*14[ ]+\?\?\?\? C5F877 vzeroupper
+[ ]*15[ ]+vpermpd \$7,%ymm6,%ymm2
+[ ]*16[ ]+\.arch \.avx2
+[ ]*17[ ]+\?\?\?\? C4E3FD01 vpermpd \$7,%ymm6,%ymm2
+[ ]*17[ ]+D607
+[ ]*18[ ]+\.arch \.f16c
+[ ]*19[ ]+\?\?\?\? C4E27D13 vcvtph2ps %xmm4,%ymm4
+[ ]*19[ ]+E4
+[ ]*20[ ]+\.arch \.fma
+[ ]*21[ ]+\?\?\?\? C4E2CD98 vfmadd132pd %ymm4,%ymm6,%ymm2
+[ ]*21[ ]+D4
+[ ]*22[ ]+\.arch \.fma4
+[ ]*23[ ]+\?\?\?\? C4E3ED69 vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ ]*23[ ]+FC60
+[ ]*24[ ]+\.arch \.xop
+[ ]*25[ ]+\?\?\?\? 8FE97881 vfrczpd %xmm7,%xmm7
+[ ]*25[ ]+FF
+[ ]*26[ ]+\.arch \.noavx2
+[ ]*27[ ]+\?\?\?\? C5F877 vzeroupper
+[ ]*28[ ]+\?\?\?\? C4E27D13 vcvtph2ps %xmm4,%ymm4
+[ ]*28[ ]+E4
+[ ]*29[ ]+\?\?\?\? C4E2CD98 vfmadd132pd %ymm4,%ymm6,%ymm2
+[ ]*29[ ]+D4
+[ ]*30[ ]+\?\?\?\? C4E3ED69 vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ ]*30[ ]+FC60
+[ ]*31[ ]+\?\?\?\? 8FE97881 vfrczpd %xmm7,%xmm7
+[ ]*31[ ]+FF
+[ ]*32[ ]+vpermpd \$7,%ymm6,%ymm2
+[ ]*33[ ]+\?\?\?\? 0FAEE8 lfence
+[ ]*34[ ]+\.arch \.noavx
+[ ]*35[ ]+vzeroupper
+[ ]*36[ ]+vcvtph2ps %xmm4,%ymm4
+[ ]*37[ ]+vfmadd132pd %ymm4,%ymm6,%ymm2
+[ ]*38[ ]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ ]*39[ ]+vfrczpd %xmm7,%xmm7
+[ ]*40[ ]+\?\?\?\? 0F77 emms
+[ ]*41[ ]+\?\?\?\? 0FAEE8 lfence
+[ ]*42[ ]+\?\?\?\? 8DB60000 \.p2align 4
+[ ]*42[ ]+00008DBC
+[ ]*42[ ]+27000000
+[ ]*42[ ]+00
+#pass
diff --git a/gas/testsuite/gas/i386/noavx-3.s b/gas/testsuite/gas/i386/noavx-3.s
new file mode 100644
index 0000000..1de49e0
--- /dev/null
+++ b/gas/testsuite/gas/i386/noavx-3.s
@@ -0,0 +1,42 @@
+# Test .arch [.avxX|.noavxX]
+ .text
+ .arch generic32
+ vcvtph2ps %xmm4,%ymm4
+ vfmadd132pd %ymm4,%ymm6,%ymm2
+ vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+ vfrczpd %xmm7,%xmm7
+ .arch .mmx
+ .arch .sse2
+ emms
+ lfence
+ vzeroupper
+ .arch .avx
+ vzeroupper
+ vpermpd $7,%ymm6,%ymm2
+ .arch .avx2
+ vpermpd $7,%ymm6,%ymm2
+ .arch .f16c
+ vcvtph2ps %xmm4,%ymm4
+ .arch .fma
+ vfmadd132pd %ymm4,%ymm6,%ymm2
+ .arch .fma4
+ vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+ .arch .xop
+ vfrczpd %xmm7,%xmm7
+ .arch .noavx2
+ vzeroupper
+ vcvtph2ps %xmm4,%ymm4
+ vfmadd132pd %ymm4,%ymm6,%ymm2
+ vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+ vfrczpd %xmm7,%xmm7
+ vpermpd $7,%ymm6,%ymm2
+ lfence
+ .arch .noavx
+ vzeroupper
+ vcvtph2ps %xmm4,%ymm4
+ vfmadd132pd %ymm4,%ymm6,%ymm2
+ vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+ vfrczpd %xmm7,%xmm7
+ emms
+ lfence
+ .p2align 4
diff --git a/gas/testsuite/gas/i386/noavx-4.d b/gas/testsuite/gas/i386/noavx-4.d
new file mode 100644
index 0000000..1fe4f24
--- /dev/null
+++ b/gas/testsuite/gas/i386/noavx-4.d
@@ -0,0 +1,25 @@
+#objdump: -drw
+#name: i386 .noavx
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 08 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 28 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: 62 f1 56 08 58 e6 vaddss %xmm6,%xmm5,%xmm4
+#pass
diff --git a/gas/testsuite/gas/i386/noavx-4.s b/gas/testsuite/gas/i386/noavx-4.s
new file mode 100644
index 0000000..fe1509f
--- /dev/null
+++ b/gas/testsuite/gas/i386/noavx-4.s
@@ -0,0 +1,22 @@
+# Test .arch .noavxX
+ .text
+ .arch generic32
+ .arch .avx512vl
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddps %xmm6, %xmm5, %xmm4{%k7}
+ vaddps %ymm6, %ymm5, %ymm4{%k7}
+ vaddps %zmm6, %zmm5, %zmm4
+ vaddss %xmm6, %xmm5, %xmm4
+ .arch .noavx2
+ vaddps %xmm6, %xmm5, %xmm4{%k7}
+ vaddps %ymm6, %ymm5, %ymm4{%k7}
+ vaddps %zmm6, %zmm5, %zmm4
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddss %xmm6, %xmm5, %xmm4
+ .arch .noavx
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddps %zmm6, %zmm5, %zmm4
+ vaddss %xmm6, %xmm5, %xmm4
diff --git a/gas/testsuite/gas/i386/nosse-4.l b/gas/testsuite/gas/i386/nosse-4.l
new file mode 100644
index 0000000..3d840fa
--- /dev/null
+++ b/gas/testsuite/gas/i386/nosse-4.l
@@ -0,0 +1,80 @@
+.*: Assembler messages:
+.*:6: Error: .*generic.*
+.*:9: Error: .*\.sse.*
+.*:12: Error: .*\.sse2.*
+.*:15: Error: .*\.sse3.*
+.*:18: Error: .*\.ssse3.*
+.*:21: Error: .*\.sse4\.1.*
+.*:28: Error: .*\.nosse4.*
+.*:32: Error: .*\.nosse4\.2.*
+.*:35: Error: .*\.nosse4\.1.*
+.*:38: Error: .*\.nossse3.*
+.*:43: Error: .*\.nosse3.*
+.*:45: Error: .*\.nommx.*
+.*:47: Error: .*\.nosse2.*
+.*:50: Error: .*\.nosse.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\# Test \.arch \[\.sseX|\.nosseX\]
+[ ]*2[ ]+\.text
+[ ]*3[ ]+\.arch generic32
+[ ]*4[ ]+\.arch \.mmx
+[ ]*5[ ]+\?\?\?\? 0F77 emms
+[ ]*6[ ]+addps %xmm0, %xmm0
+[ ]*7[ ]+\.arch \.sse
+[ ]*8[ ]+\?\?\?\? 0F58C0 addps %xmm0, %xmm0
+[ ]*9[ ]+lfence
+[ ]*10[ ]+\.arch \.sse2
+[ ]*11[ ]+\?\?\?\? 0FAEE8 lfence
+[ ]*12[ ]+mwait
+[ ]*13[ ]+\.arch \.sse3
+[ ]*14[ ]+\?\?\?\? 0F01C9 mwait
+[ ]*15[ ]+pabsd %xmm0, %xmm0
+[ ]*16[ ]+\.arch \.ssse3
+[ ]*17[ ]+\?\?\?\? 660F381E pabsd %xmm0, %xmm0
+[ ]*17[ ]+C0
+[ ]*18[ ]+ptest %xmm0, %xmm0
+[ ]*19[ ]+\.arch \.sse4\.1
+[ ]*20[ ]+\?\?\?\? 660F3817 ptest %xmm0, %xmm0
+[ ]*20[ ]+C0
+[ ]*21[ ]+crc32 %eax, %eax
+[ ]*22[ ]+\.arch \.sse4\.2
+[ ]*23[ ]+\?\?\?\? F20F38F1 crc32 %eax, %eax
+[ ]*23[ ]+C0
+[ ]*24[ ]+\.arch \.nosse
+[ ]*25[ ]+\.arch \.sse4
+[ ]*26[ ]+\?\?\?\? F20F38F1 crc32 %eax, %eax
+[ ]*26[ ]+C0
+[ ]*27[ ]+\.arch \.nosse4
+[ ]*28[ ]+ptest %xmm0, %xmm0
+[ ]*29[ ]+\?\?\?\? 660F381E pabsd %xmm0, %xmm0
+[ ]*29[ ]+C0
+[ ]*30[ ]+\.arch \.sse4
+[ ]*31[ ]+\.arch \.nosse4\.2
+[ ]*32[ ]+crc32 %eax, %eax
+[ ]*33[ ]+\?\?\?\? 660F3817 ptest %xmm0, %xmm0
+[ ]*33[ ]+C0
+[ ]*34[ ]+\.arch \.nosse4\.1
+[ ]*35[ ]+ptest %xmm0, %xmm0
+[ ]*36[ ]+\?\?\?\? 660F381E pabsd %xmm0, %xmm0
+[ ]*36[ ]+C0
+[ ]*37[ ]+\.arch \.nossse3
+[ ]*38[ ]+pabsd %xmm0, %xmm0
+[ ]*39[ ]+\?\?\?\? 0F01C9 mwait
+[ ]*40[ ]+\?\?\?\? 0F77 emms
+[ ]*41[ ]+\.arch \.nommx
+[ ]*42[ ]+\.arch \.nosse3
+[ ]*43[ ]+mwait
+[ ]*44[ ]+\?\?\?\? 0FAEE8 lfence
+[ ]*45[ ]+emms
+[ ]*46[ ]+\.arch \.nosse2
+[ ]*47[ ]+lfence
+[ ]*48[ ]+\?\?\?\? 0F58C0 addps %xmm0, %xmm0
+[ ]*49[ ]+\.arch \.nosse
+[ ]*50[ ]+addps %xmm0, %xmm0
+GAS LISTING .*
+
+
+[ ]*51[ ]+\?\?\?\? 8DB42600 \.p2align 4
+[ ]*51[ ]+000000
+#pass
diff --git a/gas/testsuite/gas/i386/nosse-4.s b/gas/testsuite/gas/i386/nosse-4.s
new file mode 100644
index 0000000..e2e7f83
--- /dev/null
+++ b/gas/testsuite/gas/i386/nosse-4.s
@@ -0,0 +1,51 @@
+# Test .arch [.sseX|.nosseX]
+ .text
+ .arch generic32
+ .arch .mmx
+ emms
+ addps %xmm0, %xmm0
+ .arch .sse
+ addps %xmm0, %xmm0
+ lfence
+ .arch .sse2
+ lfence
+ mwait
+ .arch .sse3
+ mwait
+ pabsd %xmm0, %xmm0
+ .arch .ssse3
+ pabsd %xmm0, %xmm0
+ ptest %xmm0, %xmm0
+ .arch .sse4.1
+ ptest %xmm0, %xmm0
+ crc32 %eax, %eax
+ .arch .sse4.2
+ crc32 %eax, %eax
+ .arch .nosse
+ .arch .sse4
+ crc32 %eax, %eax
+ .arch .nosse4
+ ptest %xmm0, %xmm0
+ pabsd %xmm0, %xmm0
+ .arch .sse4
+ .arch .nosse4.2
+ crc32 %eax, %eax
+ ptest %xmm0, %xmm0
+ .arch .nosse4.1
+ ptest %xmm0, %xmm0
+ pabsd %xmm0, %xmm0
+ .arch .nossse3
+ pabsd %xmm0, %xmm0
+ mwait
+ emms
+ .arch .nommx
+ .arch .nosse3
+ mwait
+ lfence
+ emms
+ .arch .nosse2
+ lfence
+ addps %xmm0, %xmm0
+ .arch .nosse
+ addps %xmm0, %xmm0
+ .p2align 4
diff --git a/gas/testsuite/gas/i386/nosse-5.d b/gas/testsuite/gas/i386/nosse-5.d
new file mode 100644
index 0000000..3d453ba
--- /dev/null
+++ b/gas/testsuite/gas/i386/nosse-5.d
@@ -0,0 +1,28 @@
+#objdump: -drw
+#name: i386 .nosse
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: 62 f1 54 0f 58 e6 vaddps %xmm6,%xmm5,%xmm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 2f 58 e6 vaddps %ymm6,%ymm5,%ymm4\{%k7\}
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: c5 d0 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: c5 d4 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: c5 d2 58 e6 vaddss %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 08 58 e6 vaddps %xmm6,%xmm5,%xmm4
+[ ]*[a-f0-9]+: 62 f1 54 28 58 e6 vaddps %ymm6,%ymm5,%ymm4
+[ ]*[a-f0-9]+: 62 f1 54 48 58 e6 vaddps %zmm6,%zmm5,%zmm4
+[ ]*[a-f0-9]+: 62 f1 56 08 58 e6 vaddss %xmm6,%xmm5,%xmm4
+#pass
diff --git a/gas/testsuite/gas/i386/nosse-5.s b/gas/testsuite/gas/i386/nosse-5.s
new file mode 100644
index 0000000..5a299f9
--- /dev/null
+++ b/gas/testsuite/gas/i386/nosse-5.s
@@ -0,0 +1,27 @@
+# Test .arch .nosse with .noavx/.avx/.avx512vl
+ .text
+ .arch generic32
+ .arch .avx
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddss %xmm6, %xmm5, %xmm4
+ .arch .nosse
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddss %xmm6, %xmm5, %xmm4
+ .arch .avx512vl
+ vaddps %xmm6, %xmm5, %xmm4{%k7}
+ vaddps %ymm6, %ymm5, %ymm4{%k7}
+ vaddps %zmm6, %zmm5, %zmm4
+ .arch .nosse
+ vaddps %xmm6, %xmm5, %xmm4{%k7}
+ vaddps %ymm6, %ymm5, %ymm4{%k7}
+ vaddps %zmm6, %zmm5, %zmm4
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddss %xmm6, %xmm5, %xmm4
+ .arch .noavx
+ vaddps %xmm6, %xmm5, %xmm4
+ vaddps %ymm6, %ymm5, %ymm4
+ vaddps %zmm6, %zmm5, %zmm4
+ vaddss %xmm6, %xmm5, %xmm4
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index a935024..f1e8142 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -46,69 +46,69 @@ static initializer cpu_flag_init[] =
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
{ "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
+ "CPU_PENTIUMPRO_FLAGS|CpuClflush|CpuSYSCALL|CPU_MMX_FLAGS|CPU_SSE2_FLAGS|CpuLM" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
"Cpu186" },
{ "CPU_I286_FLAGS",
- "Cpu186|Cpu286" },
+ "CPU_I186_FLAGS|Cpu286" },
{ "CPU_I386_FLAGS",
- "Cpu186|Cpu286|Cpu386" },
+ "CPU_I286_FLAGS|Cpu386" },
{ "CPU_I486_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486" },
+ "CPU_I386_FLAGS|Cpu486" },
{ "CPU_I586_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" },
+ "CPU_I486_FLAGS|CPU_387_FLAGS|Cpu586" },
{ "CPU_I686_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" },
+ "CPU_I586_FLAGS|Cpu686|Cpu687" },
{ "CPU_PENTIUMPRO_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop" },
+ "CPU_I686_FLAGS|CpuNop" },
{ "CPU_P2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX" },
+ "CPU_PENTIUMPRO_FLAGS|CPU_MMX_FLAGS" },
{ "CPU_P3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE" },
+ "CPU_P2_FLAGS|CPU_SSE_FLAGS" },
{ "CPU_P4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2" },
+ "CPU_P3_FLAGS|CpuClflush|CPU_SSE2_FLAGS" },
{ "CPU_NOCONA_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM|CpuCX16" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" },
{ "CPU_CORE_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuCX16" },
+ "CPU_P4_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" },
{ "CPU_CORE2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM|CpuCX16" },
+ "CPU_NOCONA_FLAGS|CPU_SSSE3_FLAGS" },
{ "CPU_COREI7_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM|CpuCX16" },
+ "CPU_CORE2_FLAGS|CPU_SSE4_2_FLAGS|CpuRdtscp" },
{ "CPU_K6_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CPU_MMX_FLAGS" },
{ "CPU_K6_2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
+ "CPU_K6_FLAGS|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "CPU_K6_2_FLAGS|Cpu686|Cpu687|CpuNop|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
+ "CPU_ATHLON_FLAGS|CpuRdtscp|CPU_SSE2_FLAGS|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" },
{ "CPU_BDVER1_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuFMA4|CpuXOP|CpuLWP|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
{ "CPU_BDVER2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ "CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" },
{ "CPU_BDVER3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" },
+ "CPU_BDVER2_FLAGS|CpuXsaveopt|CpuFSGSBase" },
{ "CPU_BDVER4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
+ "CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
{ "CPU_ZNVER1_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
{ "CPU_BTVER1_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
{ "CPU_BTVER2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+ "CPU_BTVER1_FLAGS|CPU_SSE4_2_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
- "Cpu287" },
+ "CPU_8087_FLAGS|Cpu287" },
{ "CPU_387_FLAGS",
- "Cpu387" },
- { "CPU_ANY_X87_FLAGS",
- "Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" },
+ "CPU_287_FLAGS|Cpu387" },
+ { "CPU_687_FLAGS",
+ "CPU_387_FLAGS|Cpu687" },
{ "CPU_CLFLUSH_FLAGS",
"CpuClflush" },
{ "CPU_NOP_FLAGS",
@@ -116,21 +116,19 @@ static initializer cpu_flag_init[] =
{ "CPU_SYSCALL_FLAGS",
"CpuSYSCALL" },
{ "CPU_MMX_FLAGS",
- "CpuMMX" },
+ "CpuRegMMX|CpuMMX" },
{ "CPU_SSE_FLAGS",
- "CpuMMX|CpuSSE" },
+ "CpuRegXMM|CpuSSE" },
{ "CPU_SSE2_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2" },
+ "CPU_SSE_FLAGS|CpuSSE2" },
{ "CPU_SSE3_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
+ "CPU_SSE2_FLAGS|CpuSSE3" },
{ "CPU_SSSE3_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3" },
+ "CPU_SSE3_FLAGS|CpuSSSE3" },
{ "CPU_SSE4_1_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" },
+ "CPU_SSSE3_FLAGS|CpuSSE4_1" },
{ "CPU_SSE4_2_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
- { "CPU_ANY_SSE_FLAGS",
- "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" },
+ "CPU_SSE4_1_FLAGS|CpuSSE4_2" },
{ "CPU_VMX_FLAGS",
"CpuVMX" },
{ "CPU_SMX_FLAGS",
@@ -138,17 +136,17 @@ static initializer cpu_flag_init[] =
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
{ "CPU_XSAVEOPT_FLAGS",
- "CpuXsaveopt" },
+ "CPU_XSAVE_FLAGS|CpuXsaveopt" },
{ "CPU_AES_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
+ "CPU_SSE2_FLAGS|CpuAES" },
{ "CPU_PCLMUL_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" },
+ "CPU_SSE2_FLAGS|CpuPCLMUL" },
{ "CPU_FMA_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
+ "CPU_AVX_FLAGS|CpuFMA" },
{ "CPU_FMA4_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA4" },
+ "CPU_AVX_FLAGS|CpuFMA4" },
{ "CPU_XOP_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuABM|CpuAVX|CpuFMA4|CpuXOP" },
+ "CPU_SSE4A_FLAGS|CPU_FMA4_FLAGS|CpuXOP" },
{ "CPU_LWP_FLAGS",
"CpuLWP" },
{ "CPU_BMI_FLAGS",
@@ -168,7 +166,7 @@ static initializer cpu_flag_init[] =
{ "CPU_RDRND_FLAGS",
"CpuRdRnd" },
{ "CPU_F16C_FLAGS",
- "CpuF16C" },
+ "CPU_AVX_FLAGS|CpuF16C" },
{ "CPU_BMI2_FLAGS",
"CpuBMI2" },
{ "CPU_LZCNT_FLAGS",
@@ -182,43 +180,43 @@ static initializer cpu_flag_init[] =
{ "CPU_VMFUNC_FLAGS",
"CpuVMFUNC" },
{ "CPU_3DNOW_FLAGS",
- "CpuMMX|Cpu3dnow" },
+ "CPU_MMX_FLAGS|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
- "CpuMMX|Cpu3dnow|Cpu3dnowA" },
- { "CPU_ANY_MMX_FLAGS",
- "CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "CPU_3DNOW_FLAGS|Cpu3dnowA" },
{ "CPU_PADLOCK_FLAGS",
"CpuPadLock" },
{ "CPU_SVME_FLAGS",
"CpuSVME" },
{ "CPU_SSE4A_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" },
+ "CPU_SSE3_FLAGS|CpuSSE4a" },
{ "CPU_ABM_FLAGS",
"CpuABM" },
{ "CPU_AVX_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
+ "CPU_SSE4_2_FLAGS|CpuRegYMM|CpuAVX" },
{ "CPU_AVX2_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" },
+ "CPU_AVX_FLAGS|CpuAVX2" },
+ /* Don't use CPU_AVX2_FLAGS on CPU_AVX512F_FLAGS since AVX512F doesn't
+ support YMM registers. */
{ "CPU_AVX512F_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" },
+ "CpuVREX|CPU_SSE4_2_FLAGS|CpuRegZMM|CpuRegMask|CpuAVX|CpuAVX2|CpuAVX512F" },
{ "CPU_AVX512CD_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" },
+ "CPU_AVX512F_FLAGS|CpuAVX512CD" },
{ "CPU_AVX512ER_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" },
+ "CPU_AVX512F_FLAGS|CpuAVX512ER" },
{ "CPU_AVX512PF_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" },
+ "CPU_AVX512F_FLAGS|CpuAVX512PF" },
{ "CPU_AVX512DQ_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512DQ" },
+ "CPU_AVX512F_FLAGS|CpuAVX512DQ" },
{ "CPU_AVX512BW_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512BW" },
+ "CPU_AVX512F_FLAGS|CpuAVX512BW" },
{ "CPU_AVX512VL_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VL" },
+ /* Use CPU_AVX2_FLAGS on CPU_AVX512VL_FLAGS since AVX512VL supports YMM
+ registers. */
+ "CPU_AVX512F_FLAGS|CPU_AVX2_FLAGS|CpuAVX512VL" },
{ "CPU_AVX512IFMA_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512IFMA" },
+ "CPU_AVX512F_FLAGS|CpuAVX512IFMA" },
{ "CPU_AVX512VBMI_FLAGS",
- "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" },
- { "CPU_ANY_AVX_FLAGS",
- "CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI" },
+ "CPU_AVX512F_FLAGS|CpuAVX512VBMI" },
{ "CPU_L1OM_FLAGS",
"unknown" },
{ "CPU_K1OM_FLAGS",
@@ -238,13 +236,13 @@ static initializer cpu_flag_init[] =
{ "CPU_MPX_FLAGS",
"CpuMPX" },
{ "CPU_SHA_FLAGS",
- "CpuSHA" },
+ "CPU_SSE2_FLAGS|CpuSHA" },
{ "CPU_CLFLUSHOPT_FLAGS",
"CpuClflushOpt" },
{ "CPU_XSAVES_FLAGS",
- "CpuXSAVES" },
+ "CPU_XSAVE_FLAGS|CpuXSAVES" },
{ "CPU_XSAVEC_FLAGS",
- "CpuXSAVEC" },
+ "CPU_XSAVE_FLAGS|CpuXSAVEC" },
{ "CPU_PREFETCHWT1_FLAGS",
"CpuPREFETCHWT1" },
{ "CPU_SE1_FLAGS",
@@ -260,7 +258,33 @@ static initializer cpu_flag_init[] =
{ "CPU_OSPKE_FLAGS",
"CpuOSPKE" },
{ "CPU_RDPID_FLAGS",
- "CpuRDPID" }
+ "CpuRDPID" },
+ { "CPU_ANY_X87_FLAGS",
+ "CPU_ANY_287_FLAGS|Cpu8087" },
+ { "CPU_ANY_287_FLAGS",
+ "CPU_ANY_387_FLAGS|Cpu287" },
+ { "CPU_ANY_387_FLAGS",
+ "CPU_ANY_687_FLAGS|Cpu387" },
+ { "CPU_ANY_687_FLAGS",
+ "Cpu687|CpuFISTTP" },
+ { "CPU_ANY_MMX_FLAGS",
+ "CPU_3DNOWA_FLAGS" },
+ { "CPU_ANY_SSE_FLAGS",
+ "CPU_ANY_SSE2_FLAGS|CpuSSE|CpuSSE4a" },
+ { "CPU_ANY_SSE2_FLAGS",
+ "CPU_ANY_SSE3_FLAGS|CpuSSE2" },
+ { "CPU_ANY_SSE3_FLAGS",
+ "CPU_ANY_SSSE3_FLAGS|CpuSSE3" },
+ { "CPU_ANY_SSSE3_FLAGS",
+ "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" },
+ { "CPU_ANY_SSE4_1_FLAGS",
+ "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" },
+ { "CPU_ANY_SSE4_2_FLAGS",
+ "CpuSSE4_2" },
+ { "CPU_ANY_AVX_FLAGS",
+ "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" },
+ { "CPU_ANY_AVX2_FLAGS",
+ "CpuAVX2" },
};
static initializer operand_type_init[] =
@@ -469,6 +493,11 @@ static bitfield cpu_flags[] =
BITFIELD (CpuCLZERO),
BITFIELD (CpuOSPKE),
BITFIELD (CpuRDPID),
+ BITFIELD (CpuRegMMX),
+ BITFIELD (CpuRegXMM),
+ BITFIELD (CpuRegYMM),
+ BITFIELD (CpuRegZMM),
+ BITFIELD (CpuRegMask),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
@@ -698,8 +727,37 @@ next_field (char *str, char sep, char **next, char *last)
return p;
}
+static void set_bitfield (char *, bitfield *, int, unsigned int, int);
+
+static int
+set_bitfield_from_cpu_flag_init (char *f, bitfield *array,
+ int value, unsigned int size,
+ int lineno)
+{
+ char *str, *next, *last;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE (cpu_flag_init); i++)
+ if (strcmp (cpu_flag_init[i].name, f) == 0)
+ {
+ /* Turn on selective bits. */
+ char *init = xstrdup (cpu_flag_init[i].init);
+ last = init + strlen (init);
+ for (next = init; next && next < last; )
+ {
+ str = next_field (next, '|', &next, last);
+ if (str)
+ set_bitfield (str, array, 1, size, lineno);
+ }
+ free (init);
+ return 0;
+ }
+
+ return -1;
+}
+
static void
-set_bitfield (const char *f, bitfield *array, int value,
+set_bitfield (char *f, bitfield *array, int value,
unsigned int size, int lineno)
{
unsigned int i;
@@ -745,6 +803,10 @@ set_bitfield (const char *f, bitfield *array, int value,
}
}
+ /* Handle CPU_XXX_FLAGS. */
+ if (!set_bitfield_from_cpu_flag_init (f, array, value, size, lineno))
+ return;
+
if (lineno != -1)
fail (_("%s: %d: Unknown bitfield: %s\n"), filename, lineno, f);
else
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index d01657c..c1502f9 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -202,6 +202,16 @@ enum
CpuOSPKE,
/* RDPID instruction required */
CpuRDPID,
+ /* MMX register support required */
+ CpuRegMMX,
+ /* XMM register support required */
+ CpuRegXMM,
+ /* YMM register support required */
+ CpuRegYMM,
+ /* ZMM register support required */
+ CpuRegZMM,
+ /* Mask register support required */
+ CpuRegMask,
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
@@ -310,6 +320,11 @@ typedef union i386_cpu_flags
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
unsigned int cpurdpid:1;
+ unsigned int cpuregmmx:1;
+ unsigned int cpuregxmm:1;
+ unsigned int cpuregymm:1;
+ unsigned int cpuregzmm:1;
+ unsigned int cpuregmask:1;
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused