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[PATCHv2 1/3] opcodes/arc: Move instruction length logic to new function
- From: Andrew Burgess <andrew dot burgess at embecosm dot com>
- To: binutils at sourceware dot org
- Cc: Claudiu dot Zissulescu at synopsys dot com, Cupertino dot Miranda at synopsys dot com, noamca at mellanox dot com, Andrew Burgess <andrew dot burgess at embecosm dot com>
- Date: Tue, 12 Apr 2016 12:00:17 +0100
- Subject: [PATCHv2 1/3] opcodes/arc: Move instruction length logic to new function
- Authentication-results: sourceware.org; auth=none
- References: <cover dot 1460458691 dot git dot andrew dot burgess at embecosm dot com>
- References: <1460027127-1121-1-git-send-email-andrew dot burgess at embecosm dot com> <cover dot 1460458691 dot git dot andrew dot burgess at embecosm dot com>
Move the logic that calculates the instruction length out to a new
function. Restructure the code to make it simpler.
opcodes/ChangeLog:
* arc-dis.c (arc_insn_length): New function.
(print_insn_arc): Use arc_insn_length.
---
opcodes/ChangeLog | 5 +++++
opcodes/arc-dis.c | 57 ++++++++++++++++++++++++++++++++++++++++++++-----------
2 files changed, 51 insertions(+), 11 deletions(-)
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index eb8bd67..458ba47 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -309,6 +309,41 @@ get_auxreg (const struct arc_opcode *opcode,
}
return NULL;
}
+
+/* Calculate the instruction length for an instruction starting with MSB
+ and LSB, the most and least significant byte. The ISA_MASK is used to
+ filter the instructions considered to only those that are part of the
+ current architecture.
+
+ The instruction lengths are calculated from the ARC_OPCODE table, and
+ cached for later use. */
+
+static int
+arc_insn_length (bfd_byte msb, bfd_byte lsb ATTRIBUTE_UNUSED,
+ struct disassemble_info *info)
+{
+ bfd_byte major_opcode = msb >> 3;
+ int len = 0;
+
+ switch (info->mach)
+ {
+ case bfd_mach_arc_nps400:
+ case bfd_mach_arc_arc700:
+ case bfd_mach_arc_arc600:
+ len = (major_opcode > 0xb) ? 2 : 4;
+ break;
+
+ case bfd_mach_arc_arcv2:
+ len = (major_opcode > 0x7) ? 2 : 4;
+ break;
+
+ default:
+ abort ();
+ }
+
+ return len;
+}
+
/* Disassemble ARC instructions. */
static int
@@ -422,20 +457,19 @@ print_insn_arc (bfd_vma memaddr,
return size;
}
- if ((((buffer[lowbyte] & 0xf8) > 0x38)
- && ((buffer[lowbyte] & 0xf8) != 0x48))
- || ((info->mach == bfd_mach_arc_arcv2)
- && ((buffer[lowbyte] & 0xF8) == 0x48)) /* FIXME! ugly. */
- )
+ insnLen = arc_insn_length (buffer[lowbyte], buffer[highbyte], info);
+ switch (insnLen)
{
- /* This is a short instruction. */
- insnLen = 2;
+ case 2:
insn[0] = (buffer[lowbyte] << 8) | buffer[highbyte];
- }
- else
- {
- insnLen = 4;
+ break;
+ default:
+ /* An unknown instruction is treated as being length 4. This is
+ possibly not the best solution, but matches the behaviour that was
+ in place before the table based instruction length look-up was
+ introduced. */
+ case 4:
/* This is a long instruction: Read the remaning 2 bytes. */
status = (*info->read_memory_func) (memaddr + 2, &buffer[2], 2, info);
if (status != 0)
@@ -444,6 +478,7 @@ print_insn_arc (bfd_vma memaddr,
return -1;
}
insn[0] = ARRANGE_ENDIAN (info, buffer);
+ break;
}
/* Set some defaults for the insn info. */
--
2.5.1