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RE: [PATCH] [ARC] Add new ARC EM opcodes.

From: Claudiu Zissulescu <Claudiu dot Zissulescu at synopsys dot com>
To: "binutils at sourceware dot org" <binutils at sourceware dot org>
Cc: "Francois dot Bedard at synopsys dot com" <Francois dot Bedard at synopsys dot com>
Date: Tue, 8 Mar 2016 13:29:52 +0000
Subject: RE: [PATCH] [ARC] Add new ARC EM opcodes.
Authentication-results: sourceware.org; auth=none
References: <1456405905-30875-1-git-send-email-claziss at synopsys dot com>
Ping. The patch is strait forward, if no one complains, I will push it in the next days.

Cheers,
Claudiu

> -----Original Message-----
> From: Claudiu Zissulescu
> Sent: Thursday, February 25, 2016 2:12 PM
> To: binutils@sourceware.org
> Cc: Claudiu Zissulescu; Francois.Bedard@synopsys.com
> Subject: [PATCH] [ARC] Add new ARC EM opcodes.
> 
> This patch adds new instructions for ARC EM processor.
> 
> Ok to apply?
> Claudiu
> 
> include/
> 2016-02-24  Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
> 
> opcodes/
> 2016-02-24  Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* opcode/arc-tbl.h (dsp_fp_div, dsp_fp_cmp, dsp_fp_flt2i)
> 	(dsp_fp_isflt, dsp_fp_sqrt): New instructions.
> ---
>  include/opcode/arc.h |  3 ++-
>  opcodes/arc-tbl.h    | 69
> +++++++++++++++++++++++++++++++++++++++++++++++++---
>  2 files changed, 68 insertions(+), 4 deletions(-)
> 
> diff --git a/include/opcode/arc.h b/include/opcode/arc.h
> index 6f5bc98..e2e6555 100644
> --- a/include/opcode/arc.h
> +++ b/include/opcode/arc.h
> @@ -66,7 +66,8 @@ typedef enum
>      SHFT1,
>      SHFT2,
>      SWAP,
> -    SP
> +    SP,
> +    QUARKSE
>    } insn_subclass_t;
> 
>  /* Flags class.  */
> diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
> index 5adc310..d2cfb3b 100644
> --- a/opcodes/arc-tbl.h
> +++ b/opcodes/arc-tbl.h
> @@ -7856,9 +7856,6 @@
>  /* invld052f3f00  00101RRRRR101111RRRRRRRRRR111111.  */
>  { "invld052f3f00", 0x282F003F, 0xF83F003F, ARC_OPCODE_ARCv2HS,
> INVALID, NONE, { 0 }, { 0 }},
> 
> -/* invld07  00111RRRRRRRRRRRRRRRRRRRRRRRRRRR.  */
> -{ "invld07", 0x38000000, 0xF8000000, ARC_OPCODE_ARCv2HS, INVALID,
> NONE, { 0 }, { 0 }},
> -
>  /* j c 00100RRR001000000RRRCCCCCCRRRRRR.  */
>  { "j", 0x20200000, 0xF8FF8000, ARC_OPCODE_ARC600 |
> ARC_OPCODE_ARC700, JUMP, NONE, { BRAKET, RC, BRAKETdup }, { 0 }},
> 
> @@ -18202,3 +18199,69 @@
>  /* xpkqb<.f><.cc> b,b,limm 00110bbb11100010FBBB1111100QQQQQ.  */
>  { "xpkqb", 0x30E20F80, 0xF8FF0FE0, ARC_OPCODE_ARC700, ARITH, NONE, {
> RB, RBdup, LIMM }, { C_F, C_CC }},
> 
> +/* QuarkSE specific instructions.  */
> +{"dsp_fp_div", 0x382A0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, RC }, { C_F }},
> +{"dsp_fp_div", 0x382A003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, RC }, { C_F }},
> +{"dsp_fp_div", 0x38EA0000, 0xF8FF0020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, RC }, { C_F, C_CC }},
> +{"dsp_fp_div", 0x386A0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_div", 0x386A003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_div", 0x38EA0020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, UIMM6_20 }, { C_F, C_CC }},
> +{"dsp_fp_div", 0x38AA0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, SIMM12_20 }, { C_F }},
> +{"dsp_fp_div", 0x3E2A7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, RC }, { C_F }},
> +{"dsp_fp_div", 0x382A0F80, 0xF8FF0FC0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, LIMM }, { C_F }},
> +{"dsp_fp_div", 0x3E2A703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, RC }, { C_F }},
> +{"dsp_fp_div", 0x382A0FBE, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, LIMM }, { C_F }},
> +{"dsp_fp_div", 0x3EEA7000, 0xFFFF7020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, RC }, { C_F, C_CC }},
> +{"dsp_fp_div", 0x38EA0F80, 0xF8FF0FE0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, LIMM }, { C_F, C_CC }},
> +{"dsp_fp_div", 0x3E6A7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, UIMM6_20 }, { C_F }},
> +{"dsp_fp_div", 0x3E6A703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, UIMM6_20 }, { C_F }},
> +{"dsp_fp_div", 0x3EEA7020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, UIMM6_20 }, { C_F, C_CC }},
> +{"dsp_fp_div", 0x3EAA7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, SIMM12_20 }, { C_F }},
> +{"dsp_fp_div", 0x3E2A7F80, 0xFFFF7FC0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, LIMMdup }, { C_F }},
> +{"dsp_fp_div", 0x3E2A7FBE, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, LIMMdup }, { C_F }},
> +{"dsp_fp_div", 0x3EEA7F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, LIMMdup }, { C_F, C_CC }},
> +
> +{"dsp_fp_cmp", 0x382B0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, RC }, { C_F }},
> +{"dsp_fp_cmp", 0x382B003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, RC }, { C_F }},
> +{"dsp_fp_cmp", 0x38EB0000, 0xF8FF0020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, RC }, { C_F, C_CC }},
> +{"dsp_fp_cmp", 0x386B0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x386B003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x38EB0020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, UIMM6_20 }, { C_F, C_CC }},
> +{"dsp_fp_cmp", 0x38AB0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, SIMM12_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x3E2B7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, RC }, { C_F }},
> +{"dsp_fp_cmp", 0x382B0F80, 0xF8FF0FC0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, RB, LIMM }, { C_F }},
> +{"dsp_fp_cmp", 0x3E2B703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, RC }, { C_F }},
> +{"dsp_fp_cmp", 0x382B0FBE, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RB, LIMM }, { C_F }},
> +{"dsp_fp_cmp", 0x3EEB7000, 0xFFFF7020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, RC }, { C_F, C_CC }},
> +{"dsp_fp_cmp", 0x38EB0F80, 0xF8FF0FE0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RBdup, LIMM }, { C_F, C_CC }},
> +{"dsp_fp_cmp", 0x3E6B7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, UIMM6_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x3E6B703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, UIMM6_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x3EEB7020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, UIMM6_20 }, { C_F, C_CC }},
> +{"dsp_fp_cmp", 0x3EAB7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, SIMM12_20 }, { C_F }},
> +{"dsp_fp_cmp", 0x3E2B7F80, 0xFFFF7FC0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RA, LIMM, LIMMdup }, { C_F }},
> +{"dsp_fp_cmp", 0x3E2B7FBE, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, LIMMdup }, { C_F }},
> +{"dsp_fp_cmp", 0x3EEB7F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM, LIMMdup }, { C_F, C_CC }},
> +
> +{"dsp_fp_flt2i", 0x382F002B, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RC }, { C_F }},
> +{"dsp_fp_flt2i", 0x3E2F702B, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RC }, { C_F }},
> +{"dsp_fp_flt2i", 0x386F002B, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_flt2i", 0x3E6F702B, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, UIMM6_20 }, { C_F }},
> +{"dsp_fp_flt2i", 0x382F0FAB, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, LIMM }, { C_F }},
> +{"dsp_fp_flt2i", 0x3E2F7FAB, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM }, { C_F }},
> +
> +{"dsp_fp_i2flt", 0x382F002C, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RC }, { C_F }},
> +{"dsp_fp_i2flt", 0x3E2F702C, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RC }, { C_F }},
> +{"dsp_fp_i2flt", 0x386F002C, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_i2flt", 0x3E6F702C, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, UIMM6_20 }, { C_F }},
> +{"dsp_fp_i2flt", 0x382F0FAC, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, LIMM }, { C_F }},
> +{"dsp_fp_i2flt", 0x3E2F7FAC, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM }, { C_F }},
> +
> +{"dsp_fp_sqrt", 0x382F002D, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, RC }, { C_F }},
> +{"dsp_fp_sqrt", 0x3E2F702D, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, RC }, { C_F }},
> +{"dsp_fp_sqrt", 0x386F002D, 0xF8FF003F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, UIMM6_20 }, { C_F }},
> +{"dsp_fp_sqrt", 0x3E6F702D, 0xFFFF703F, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, UIMM6_20 }, { C_F }},
> +{"dsp_fp_sqrt", 0x382F0FAD, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { RB, LIMM }, { C_F }},
> +{"dsp_fp_sqrt", 0x3E2F7FAD, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM, FLOAT,
> QUARKSE, { ZA, LIMM }, { C_F }},
> +
> +/* invld07  00111RRRRRRRRRRRRRRRRRRRRRRRRRRR.  */
> +{ "invld07", 0x38000000, 0xF8000000, ARC_OPCODE_ARCv2HS, INVALID,
> NONE, { 0 }, { 0 }},
> --
> 1.9.1
Follow-Ups:
- Re: [PATCH] [ARC] Add new ARC EM opcodes.
  - From: Nick Clifton
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