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[PATCH][Binutils][ARM] ldah being disassembled as ldaexh
- From: Andre Vieira <Andre dot SimoesDiasVieira at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Wed, 25 Nov 2015 13:56:55 +0000
- Subject: [PATCH][Binutils][ARM] ldah being disassembled as ldaexh
- Authentication-results: sourceware.org; auth=none
Hi,
This patch fixes the disassembling of ldah instructions in arm
assembly, where they were previously being disassembled as ldaexh. It
also fixes the wrong testcase containing the encoding for ldah being
disassembled as ldaexh.
This is correct because the arm encoding for ldah should be
disassembled as ldah and not ldaexh. See ARMv8-A Reference Manual
(http://infocenter.arm.com/help/topic/com.arm.doc.ddi0487a.h/index.html).
Tested by running the gas regression suite for arm.
Is this OK to commit?
Thanks,
Andre Vieira
*** opcodes/ChangeLog ***
2015-11-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
* arm-dis.c (arm_opcodes): <ldaexh>: Fix typo...
<ldah>: ... to this.
*** gas/testsuite/ChangeLog ***
2015-11-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
* armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
<ldah>: ... to this.
From 22717a58abe7f38208cee1f82eb3dc9232311b5d Mon Sep 17 00:00:00 2001
From: Andre Simoes Dias Vieira <andsim01@arm.com>
Date: Tue, 24 Nov 2015 11:43:00 +0000
Subject: [PATCH] Changed ldaexh for ldah pattern.
---
gas/testsuite/gas/arm/armv8-a.d | 6 +++---
opcodes/arm-dis.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/gas/testsuite/gas/arm/armv8-a.d b/gas/testsuite/gas/arm/armv8-a.d
index 60e5067524065085efc1e18d68eb7cbb9f257533..2119bcbd21bfb203dfb0a535f7a2e47d5530208a 100644
--- a/gas/testsuite/gas/arm/armv8-a.d
+++ b/gas/testsuite/gas/arm/armv8-a.d
@@ -32,9 +32,9 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> e1d00c9f ldab r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1d11c9f ldab r1, \[r1\]
0[0-9a-f]+ <[^>]+> e1deec9f ldab lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1f00c9f ldaexh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1f11c9f ldaexh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1feec9f ldaexh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1f00c9f ldah r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1f11c9f ldah r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1feec9f ldah lr, \[lr\]
0[0-9a-f]+ <[^>]+> e1900c9f lda r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1911c9f lda r1, \[r1\]
0[0-9a-f]+ <[^>]+> e19eec9f lda lr, \[lr\]
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index cff4b3fcb6d260b664e348541098958260c10e77..94fe304f5ac68bfea77528770038935d9f0c0feb 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1608,7 +1608,7 @@ static const struct opcode32 arm_opcodes[] =
{ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
- 0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
+ 0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"},
/* CRC32 instructions. */
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"},
--
1.9.1