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[PATCH, binutils/ARM] Make CPS unavailable for ARMv7e-M
- From: "Thomas Preud'homme" <thomas dot preudhomme at arm dot com>
- To: <binutils at sourceware dot org>
- Date: Tue, 20 Oct 2015 10:28:34 +0800
- Subject: [PATCH, binutils/ARM] Make CPS unavailable for ARMv7e-M
- Authentication-results: sourceware.org; auth=none
Hi,
According to the ARM Architecture Reference Manuals, the cps instruction with immediate is only available for ARMv6t2 and ARMv7 in the A and R profiles. ARMv7-M ARM only lists cpsie and cpsid being available. Yet, gas currently accept cps with an immediate for -march=armv7e-m. This patch moves the definition of CPS to be in the group of instructions available to ARMv6 or later architectures supporting non Thumb instructions.
ChangeLog entry is as follows:
*** gas/ChangeLog ***
2015-10-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (insns): Guard cps by arm_ext_v6_notm instead of
arm_ext_v6_dsp.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index efc522a..49b36c7 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -18892,11 +18892,11 @@ static const struct asm_opcode insns[] =
UF(srsed, 8400500, 2, (oRRw, I31w), srs),
TUF("srsdb", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
TUF("srsfd", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
+ TUF("cps", 1020000, f3af8100, 1, (I31b), imm0, t_cps),
/* ARM V6 not included in V7M (eg. integer SIMD). */
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v6_dsp
- TUF("cps", 1020000, f3af8100, 1, (I31b), imm0, t_cps),
TCE("pkhbt", 6800010, eac00000, 4, (RRnpc, RRnpc, RRnpc, oSHll), pkhbt, t_pkhbt),
TCE("pkhtb", 6800050, eac00020, 4, (RRnpc, RRnpc, RRnpc, oSHar), pkhtb, t_pkhtb),
TCE("qadd16", 6200f10, fa90f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
Testsuite shows no regression.
Best regards,
Thomas