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Re: [PATCH] Add support for MIPS R6 evp and dvp instructions.


Andrew Bennett <Andrew.Bennett@imgtec.com> writes:
> Hi,
>
> This patch adds support for the MIPS R6 enable/disable virtual processor 
> instructions (evp/dvp).  The documentation for the instructions is available at 
> http://www.imgtec.com/mips/architectures/mips32.asp 
>
> The patch and ChangeLog is below.
>
> Ok to commit?

OK, thanks.

Richard

> Many thanks,
>
>
> Andrew
>
>
>     
>     opcodes/
>     	* mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
>     
>     gas/testsuite/
>     	* gas/mips/r6.s: Add evp and dvp instructions.
>     	* gas/mips/r6.d: Likewise.
>     	* gas/mips/r6-n32.d: Likewise.
>     	* gas/mips/r6-n64.d: Likewise.
>
>
> diff --git a/gas/testsuite/gas/mips/r6-n32.d b/gas/testsuite/gas/mips/r6-n32.d
> index d4e9859..acca6c4 100644
> --- a/gas/testsuite/gas/mips/r6-n32.d
> +++ b/gas/testsuite/gas/mips/r6-n32.d
> @@ -493,4 +493,8 @@ Disassembly of section .text:
>  0+0588 <[^>]*> f8040000 	jalrc	a0
>  0+058c <[^>]*> 04100000 	nal
>  0+0590 <[^>]*> 00000000 	nop
> +0+0594 <[^>]*> 41600004 	evp
> +0+0598 <[^>]*> 41600024 	dvp
> +0+059c <[^>]*> 41620004 	evp	v0
> +0+05a0 <[^>]*> 41620024 	dvp	v0
>  	\.\.\.
> diff --git a/gas/testsuite/gas/mips/r6-n64.d b/gas/testsuite/gas/mips/r6-n64.d
> index e388e7a..10deeae 100644
> --- a/gas/testsuite/gas/mips/r6-n64.d
> +++ b/gas/testsuite/gas/mips/r6-n64.d
> @@ -749,4 +749,8 @@ Disassembly of section .text:
>  0+0588 <[^>]*> f8040000 	jalrc	a0
>  0+058c <[^>]*> 04100000 	nal
>  0+0590 <[^>]*> 00000000 	nop
> +0+0594 <[^>]*> 41600004 	evp
> +0+0598 <[^>]*> 41600024 	dvp
> +0+059c <[^>]*> 41620004 	evp	v0
> +0+05a0 <[^>]*> 41620024 	dvp	v0
>  	\.\.\.
> diff --git a/gas/testsuite/gas/mips/r6.d b/gas/testsuite/gas/mips/r6.d
> index 94ab611..cca10a7 100644
> --- a/gas/testsuite/gas/mips/r6.d
> +++ b/gas/testsuite/gas/mips/r6.d
> @@ -492,4 +492,8 @@ Disassembly of section .text:
>  0+0588 <[^>]*> f8040000 	jalrc	a0
>  0+058c <[^>]*> 04100000 	nal
>  0+0590 <[^>]*> 00000000 	nop
> +0+0594 <[^>]*> 41600004 	evp
> +0+0598 <[^>]*> 41600024 	dvp
> +0+059c <[^>]*> 41620004 	evp	v0
> +0+05a0 <[^>]*> 41620024 	dvp	v0
>  	\.\.\.
> diff --git a/gas/testsuite/gas/mips/r6.s b/gas/testsuite/gas/mips/r6.s
> index e4ee083..0635066 100644
> --- a/gas/testsuite/gas/mips/r6.s
> +++ b/gas/testsuite/gas/mips/r6.s
> @@ -261,6 +261,11 @@ new:	maddf.s	$f0,$f1,$f2
>  	jalrc	$4
>  	nal
>  
> +	evp
> +	dvp
> +	evp	$2
> +	dvp	$2
> +
>  # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
>  	.align  2
>  	.space  8
> diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
> index 0472b5b..f43f9f5 100644
> --- a/opcodes/mips-opc.c
> +++ b/opcodes/mips-opc.c
> @@ -1147,6 +1147,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
>  {"dsubu",		"d,v,I",	0,    (int) M_DSUBU_I,	INSN_MACRO,		0,		I3,		0,	0 },
>  {"dvpe",		"",		0x41600001, 0xffffffff, TRAP,			0,		0,		MT32,	0 },
>  {"dvpe",		"t",		0x41600001, 0xffe0ffff, WR_1|TRAP,		0,		0,		MT32,	0 },
> +{"dvp",			"",		0x41600024, 0xffffffff, TRAP,			0,		I37,		0,	0 },
> +{"dvp",			"t",		0x41600024, 0xffe0ffff, WR_1|TRAP,		0,		I37,		0,	0 },
>  {"ei",			"",		0x42000038, 0xffffffff,	WR_C0,			0,		EE,		0,	0 },
>  {"ei",			"",		0x41606020, 0xffffffff,	WR_C0,			0,		I33,		0,	0 },
>  {"ei",			"t",		0x41606020, 0xffe0ffff,	WR_1|WR_C0,		0,		I33,		0,	0 },
> @@ -1156,6 +1158,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
>  {"eretnc",		"",		0x42000058, 0xffffffff, NODS,      		0,		I36,		0,	0 },
>  {"evpe",		"",		0x41600021, 0xffffffff, TRAP,			0,		0,		MT32,	0 },
>  {"evpe",		"t",		0x41600021, 0xffe0ffff, WR_1|TRAP,		0,		0,		MT32,	0 },
> +{"evp",			"",		0x41600004, 0xffffffff, TRAP,			0,		I37,		0,	0 },
> +{"evp",			"t",		0x41600004, 0xffe0ffff, WR_1|TRAP,		0,		I37,		0,	0 },
>  {"ext",			"t,r,+A,+C",	0x7c000000, 0xfc00003f, WR_1|RD_2,    		0,		I33,		0,	0 },
>  {"exts32",		"t,r,+p,+s",	0x7000003b, 0xfc00003f, WR_1|RD_2,		0,		IOCT,		0,	0 },
>  {"exts",		"t,r,+P,+S",	0x7000003b, 0xfc00003f, WR_1|RD_2,		0,		IOCT,		0,	0 }, /* exts32 */


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