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Re: [Patch][AArch64] - Error on load pair to same register


On 14-11-20 10:32 AM, Richard Earnshaw wrote:
On 20/11/14 11:46, Vidya Praveen wrote:
Example:

/tmp/33604024.0/ccFboXqy.s: Assembler messages:
/tmp/33604024.0/ccFboXqy.s:355: Warning: unpredictable register after writeback -- `str q0,[x0],16'
output is:
/tmp/33604024.0/ccFboXqy.s: Assembler messages:
/tmp/33604024.0/ccFboXqy.s:355: Warning: unpredictable register after writeback -- `str q0,[x0],16'


Whoops.  Fixed thusly:

2014-11-20  Richard Earnshaw  <rearnsha@arm.com>

	* config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer
	registers are in the GP register set.  Adjust warnings.  Use correct
	field member for address register.
	* testsuite/gas/aarch64/diagnostic.l: Update.

Thanks for the fixup Richard. Sorry about the breakage.

Regards,

Ryan Mansfield


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