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Re: [PATCH 1/4][x86] Support clwb,pcommit,ifma,vbmi.


On Fri, Nov 14, 2014 at 6:55 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
> On 13 Nov 10:26, H.J. Lu wrote:
>> On Thu, Nov 13, 2014 at 10:05 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
>> > On 12 Nov 07:58, H.J. Lu wrote:
>> >> On Wed, Nov 12, 2014 at 5:55 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
>> >> > Hi,
>> >> >
>> >> > Recent release of Intel ISA reference [1] has 4 new ISA extensions:
>> >> > CLWB,PCOMMIT,AVX512IFMA,AVX512VBMI.
>> >> > Attached patch adds support for them.
>> >> > Ok for trunk?
>> >> >
>> >> > 1:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
>> >>
>> >> Please break it into 4 patches, one for each CPUID feature bit.
>> >>
>> >> Thanks.
>> >>
>> > This part adds clwb.
>>
>> 1.  Please change cpuid name from CLWBK to CLWB to match
>> the spec.
>> 2.  Please add .clwb directive support and document it.
>>
> Thanks for the review.
> Updated patch attached.

Please rename PREFIX_0FAEF8 to PREFIX_RM_0_0FAE_REG_7.

+  /* PREFIX_0FAEF8 */
+  {
+    { "sfence",                { Skip_MODRM } },
+    { Bad_Opcode },
+    { "pcommit",               { Skip_MODRM } },
+  },
+
   /* PREFIX_0FB8 */
   {
     { Bad_Opcode },
@@ -12035,7 +12043,7 @@ static const struct dis386 rm_table[][8] = {
   },
   {
     /* RM_0FAE_REG_7 */
-    { "sfence",                { Skip_MODRM } },
+    { PREFIX_TABLE (PREFIX_0FAEF8) },
   },


-- 
H.J.


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