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Re: [PATCH] Support VU0 on MIPS R5900
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: <binutils at sourceware dot org>
- Date: Fri, 23 Aug 2013 15:24:48 +0100
- Subject: Re: [PATCH] Support VU0 on MIPS R5900
- References: <20130108234130 dot 27410 at gmx dot net> <87a9rrso6l dot fsf at talisman dot default> <trinity-c3dc44a3-27c5-482b-b113-ca0cae29d590-1375046137093 at 3capp-gmx-bs55> <87mwp39mfo dot fsf at talisman dot default> <alpine dot DEB dot 1 dot 10 dot 1308011402470 dot 32382 at tp dot orcam dot me dot uk> <87haf986nc dot fsf at talisman dot default>
On Thu, 1 Aug 2013, Richard Sandiford wrote:
> > Thanks for this work, I look forward to seeing your change in. This will
> > hopefully let us make GAS handle delay-slot scheduling optimally for the
> > microMIPS instructions I had to pessimise due to the lack of free pinfo
> > bits (i.e. ALNV.PS, and the instructions using the INSN2_MOD_* macros).
>
> Yeah, it should help with that. The patches make READ_SP available to
> microMIPS as a side-effect, but the other cases should be fair game too.
> It'd be good not to eat all the new bits at once though :-)
>
> I went ahead and applied the patches tonight since they seem to have been
> stable locally.
>
> The new approach is to refer to operands by number rather than name,
> so it should just be a case of adding RD_4 to the ALNV.PS list.
> That's preapproved if it works.
I have thus committed the change below, regression-tested on mips-sde-elf
and mips-linux-gnu. I'll see yet if there's still anything to do about
the other instructions I had in mind (NOT, NOR, some other ALU and some
branches).
Thanks for the great piece of work that made difficult things simple! :)
2013-08-23 Maciej W. Rozycki <macro@codesourcery.com>
opcodes/
* micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
replacing NODS.
gas/testsuite/
* gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
slot scheduling of ALNV.PS.
* gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* gas/testsuite/gas/mips/micromips-trap.d: Likewise.
* gas/testsuite/gas/mips/micromips.d: Likewise.
* gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.
Maciej
binutils-umips-opcodes-alnv.diff
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-insn32.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/micromips-insn32.d 2013-08-22 17:59:32.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-insn32.d 2013-08-23 01:38:24.257810991 +0100
@@ -5106,10 +5106,9 @@
[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0
[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra
[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
-[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
[ 0-9a-f]+: 0000 0000 nop
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-noinsn32.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/micromips-noinsn32.d 2013-08-22 17:59:32.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-noinsn32.d 2013-08-23 01:38:35.258352343 +0100
@@ -5085,10 +5085,9 @@
[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0
[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra
[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
-[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
[ 0-9a-f]+: 0c00 nop
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-trap.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/micromips-trap.d 2013-08-22 17:59:32.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips-trap.d 2013-08-23 01:38:44.768280225 +0100
@@ -5091,10 +5091,9 @@
[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0
[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra
[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
-[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
[ 0-9a-f]+: 0c00 nop
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/micromips.d 2013-08-22 17:59:32.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips.d 2013-08-23 01:38:52.268777999 +0100
@@ -5163,10 +5163,9 @@
[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0
[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra
[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
-[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra
[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test
[ 0-9a-f]+: 0c00 nop
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d 2013-08-22 23:00:04.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d 2013-08-23 01:34:43.208778295 +0100
@@ -6,37 +6,28 @@
# Check that a register dependency between ALNV.PS and the following
# branch prevents from branch swapping (microMIPS).
-# Note that currently swapping of ALNV.PS in microMIPS code is disabled
-# altogether.
-
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
-([0-9a-f]+) <[^>]*> cfff b \1 <foo\+0x[0-9a-f]+>
+([0-9a-f]+) <[^>]*> cfff b \1 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 foo
-[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo
-[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
([0-9a-f]+) <[^>]*> 4023 fffe bltzal v1,\1 <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo
-[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
[0-9a-f]+ <[^>]*> 45c3 jalr v1
-[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
[0-9a-f]+ <[^>]*> 0083 0f3c jalr a0,v1
-[0-9a-f]+ <[^>]*> 0000 0000 nop
+[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1
[0-9a-f]+ <[^>]*> 007f 0f3c jalr v1,ra
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
([0-9a-f]+) <[^>]*> cfff b \1 <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 foo
-[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo
@@ -48,10 +39,8 @@
[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
[0-9a-f]+ <[^>]*> 45c3 jalr v1
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
[0-9a-f]+ <[^>]*> 0083 0f3c jalr a0,v1
-[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
[0-9a-f]+ <[^>]*> 007f 0f3c jalr v1,ra
-[0-9a-f]+ <[^>]*> 0000 0000 nop
+[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra
\.\.\.
Index: binutils-fsf-trunk-quilt/opcodes/micromips-opc.c
===================================================================
--- binutils-fsf-trunk-quilt.orig/opcodes/micromips-opc.c 2013-08-23 00:53:16.000000000 +0100
+++ binutils-fsf-trunk-quilt/opcodes/micromips-opc.c 2013-08-23 01:34:43.208778295 +0100
@@ -309,9 +309,7 @@ const struct mips_opcode micromips_opcod
{"addu", "md,me,ml", 0x0400, 0xfc01, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
{"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, 0, I1, 0, 0 },
-/* We have no flag to mark the read from "y", so we use NODS to disable
- delay slot scheduling of ALNV.PS altogether. */
-{"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|NODS|FP_D, 0, I1, 0, 0 },
+{"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 },
{"and", "mf,mt,mg", 0x4480, 0xffc0, MOD_1|RD_3, 0, I1, 0, 0 },
{"and", "mf,mg,mx", 0x4480, 0xffc0, MOD_1|RD_2, 0, I1, 0, 0 },
{"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },