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[PATCH] gas/config/tc-arm.c: Improve validation of NEON addressing modes.
- From: Will Newton <will dot newton at linaro dot org>
- To: binutils at sourceware dot org
- Cc: patches at linaro dot org
- Date: Mon, 19 Aug 2013 10:24:05 +0100
- Subject: [PATCH] gas/config/tc-arm.c: Improve validation of NEON addressing modes.
NEON vector load and store instructions do not accept immediates
or pre-indexed base plus offset addressing modes, so make sure that
the assembler enforces this.
gas/ChangeLog:
2013-08-19 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
for pre-indexed addressing modes.
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
VLDn and VSTn instructions.
* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
---
gas/config/tc-arm.c | 16 ++++++++++++----
gas/testsuite/gas/arm/neon-addressing-bad.l | 22 +++++++++++++---------
gas/testsuite/gas/arm/neon-addressing-bad.s | 4 ++++
3 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 21369d7..50e0da7 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -16008,12 +16008,20 @@ do_neon_ldx_stx (void)
_("bad register for post-index"));
inst.instruction |= postreg;
}
- else if (inst.operands[1].writeback)
+ else
{
- inst.instruction |= 0xd;
+ constraint (inst.operands[1].immisreg, BAD_ADDR_MODE);
+ constraint (inst.reloc.exp.X_op != O_constant
+ || inst.reloc.exp.X_add_number != 0,
+ BAD_ADDR_MODE);
+
+ if (inst.operands[1].writeback)
+ {
+ inst.instruction |= 0xd;
+ }
+ else
+ inst.instruction |= 0xf;
}
- else
- inst.instruction |= 0xf;
if (thumb_mode)
inst.instruction |= 0xf9000000;
diff --git a/gas/testsuite/gas/arm/neon-addressing-bad.l b/gas/testsuite/gas/arm/neon-addressing-bad.l
index a8bc720..38e1801 100644
--- a/gas/testsuite/gas/arm/neon-addressing-bad.l
+++ b/gas/testsuite/gas/arm/neon-addressing-bad.l
@@ -12,12 +12,16 @@
[^:]*:14: Error: only loads support such operands -- `vst2.8 {D0\[\].*
[^:]*:15: Error: only loads support such operands -- `vst3.16 {D0\[\].*
[^:]*:16: Error: only loads support such operands -- `vst4.32 {D0\[\].*
-[^:]*:18: Error: r15 not allowed here -- `vld1.8 {d0},2f'
-[^:]*:20: Error: r15 not allowed here -- `vld1.8 {D0},R0'
-[^:]*:21: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
-[^:]*:22: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
-[^:]*:23: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
-[^:]*:24: Error: r15 not allowed here -- `vst1.8 {D0},R0'
-[^:]*:25: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
-[^:]*:26: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
-[^:]*:27: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'
+[^:]*:17: Error: instruction does not accept this addressing mode -- `vld1.8 {Q0},\[R0,#8\]'
+[^:]*:18: Error: instruction does not accept this addressing mode -- `vld1.8 {Q0},\[R0,#8\]!'
+[^:]*:19: Error: instruction does not accept this addressing mode -- `vld1.8 {Q0},\[R0,R1\]'
+[^:]*:20: Error: instruction does not accept this addressing mode -- `vld1.8 {Q0},\[R0,R1\]!'
+[^:]*:22: Error: r15 not allowed here -- `vld1.8 {d0},2f'
+[^:]*:24: Error: r15 not allowed here -- `vld1.8 {D0},R0'
+[^:]*:25: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
+[^:]*:26: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
+[^:]*:27: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
+[^:]*:28: Error: r15 not allowed here -- `vst1.8 {D0},R0'
+[^:]*:29: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
+[^:]*:30: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
+[^:]*:31: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'
diff --git a/gas/testsuite/gas/arm/neon-addressing-bad.s b/gas/testsuite/gas/arm/neon-addressing-bad.s
index c27b172..6f7e769 100644
--- a/gas/testsuite/gas/arm/neon-addressing-bad.s
+++ b/gas/testsuite/gas/arm/neon-addressing-bad.s
@@ -14,6 +14,10 @@ VST1.8 {D0[]}, [R0]
VST2.8 {D0[], D2[]}, [R0]
VST3.16 {D0[], D1[], D2[]}, [R0]
VST4.32 {D0[], D1[], D2[], D3[]}, [R0]
+VLD1.8 {Q0}, [R0, #8]
+VLD1.8 {Q0}, [R0, #8]!
+VLD1.8 {Q0}, [R0, R1]
+VLD1.8 {Q0}, [R0, R1]!
.thumb
VLD1.8 {d0}, 2f
2:
--
1.8.1.4