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Re: [PATCH, i386] [1/2] Support of AVX512 ISA extension
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Cc: Binutils <binutils at sourceware dot org>, Areg Melik-Adamyan <areg dot melikadamyan at gmail dot com>
- Date: Fri, 26 Jul 2013 10:25:21 -0700
- Subject: Re: [PATCH, i386] [1/2] Support of AVX512 ISA extension
- References: <51EFC2AC dot 8030806 at gmail dot com> <CAGs3Rfuo6Q9O2zvw_CiRRCwordxVU7OG8+WZR=G3A0Av543wwg at mail dot gmail dot com> <CAMe9rOooAHnqbbMaz1wD_3DAHxpAUj9cUWTdha5KuBZoHP3mQg at mail dot gmail dot com> <20130726165416 dot GA42421 at msticlxl57 dot ims dot intel dot com>
On Fri, Jul 26, 2013 at 9:54 AM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hi HJ,
> Thanks for inputs!
>
> Updated patch and ChangeLog attached (again, 2 pieces).
I checked it in with some ChangeLog changes:
* doc/c-i386.texi: Document mevexlig and mevexwig.
is changed to
* doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
Combined 2 lines in
* gas/cfi/cfi-x86_64.d: Change to reflect above
mentioned changes.
Changed
* i386-gen.c (cpu_flag_init): Add CpuAVX512F, CpuAVX512CD,
CpuAVX512ER and CpuAVX512PF.
(operand_type_init): Add RegZMM, RegMask, Vec_Disp8.
to
* i386-gen.c (cpu_flag_init): Update CPU_ANY_SSE_FLAGS and
CPU_ANY_AVX_FLAGS. Add CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS,
CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGZMM,
OPERAND_TYPE_REGMASK and OPERAND_TYPE_VEC_DISP8.
Please mean the first field in cpu_flag_init and operand_type_init
in opcodes/ChangeLog.
--
H.J.