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RE: [PATCH] MIPS EVA ASE Support
- From: Chao-Ying Fu <Chao-Ying dot Fu at imgtec dot com>
- To: "'Moore, Catherine'" <Catherine_Moore at mentor dot com>, "rdsandiford at googlemail dot com" <rdsandiford at googlemail dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Mon, 3 Jun 2013 18:23:16 +0000
- Subject: RE: [PATCH] MIPS EVA ASE Support
- References: <FD3DCEAC5B03E9408544A1E416F11242F8FC6EE7 at NA-MBX-01 dot mgc dot mentorg dot com>
Moore, Catherine wrote:
>
> Hi Richard,
>
> This patch implements the MIPS EVA instruction set in gas.
> Documention for the new instructions can be found in the
> MIPS32 Instruction set documentation:
>
> http://www.mips.com/auth/MD00086-2B-MIPS32BIS-AFP-03.51.pdf
>
>
> Does this patch look okay to install?
> Thanks,
> Catherine
>
>
@@ -784,7 +791,8 @@ static const unsigned int mips_isa_table
#define INSN_LOONGSON_3A 0x00000400
/* RMI Xlr instruction */
#define INSN_XLR 0x00000020
-
+/* MIPS32 Enhanced VA Scheme */
+#define INSN_EVA 0x00000040
/* MCU (MicroController) ASE */
#define INSN_MCU 0x00000010
Unfortunately, 0x00000040 is used by INSN_VIRT64. I think all bits are used.
Ex:
0 For ISA
1 For ISA
2 For ISA
3 For ISA
4 #define INSN_MCU 0x00000010
5 #define INSN_XLR 0x00000020
6 #define INSN_VIRT64 0x00000040
7 #define INSN_VIRT 0x00000080
8 #define INSN_OCTEONP 0x00000100
9 #define INSN_OCTEON2 0x00000200
10 #define INSN_LOONGSON_3A 0x00000400
11 #define INSN_OCTEON 0x00000800
12 #define INSN_DSP 0x00001000
13 #define INSN_DSP64 0x00002000
14 #define INSN_5900 0x00004000
15 #define INSN_MIPS3D 0x00008000
16 #define INSN_4650 0x00010000
17 #define INSN_4010 0x00020000
18 #define INSN_4100 0x00040000
19 #define INSN_3900 0x00080000
20 #define INSN_10000 0x00100000
21 #define INSN_SB1 0x00200000
22 #define INSN_4111 0x00400000
23 #define INSN_4120 0x00800000
24 #define INSN_5400 0x01000000
25 #define INSN_5500 0x02000000
26 #define INSN_MDMX 0x04000000
27 #define INSN_MT 0x08000000
28 #define INSN_SMARTMIPS 0x10000000
29 #define INSN_DSPR2 0x20000000
30 #define INSN_LOONGSON_2E 0x40000000
31 #define INSN_LOONGSON_2F 0x80000000
We may need a new field as membership2 in "struct mips_opcode".
Thanks!
Regards,
Chao-ying