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[RFA/ARM 10/21] Add support for HLT
- From: Matthew Gretton-Dann <matthew dot gretton-dann at arm dot com>
- To: binutils at sourceware dot org
- Date: Thu, 23 Aug 2012 15:59:56 +0100
- Subject: [RFA/ARM 10/21] Add support for HLT
- References: <cover.1345733341.git.matthew.gretton-dann@arm.com>
ARMv8 adds a HLT instruction in A32 and T32.
This patch adds support for it.
gas/ChangeLog:
2012-08-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_t_bkpt_hlt1): New function.
(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
gas/testsuite/ChangeLog:
2012-08-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.l: Update for HLT.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
opcodes/ChangeLog:
2012-08-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 1c5eb31..d98944b 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -10198,18 +10198,34 @@ do_t_branch (void)
inst.reloc.pc_rel = 1;
}
+/* Actually do the work for Thumb state bkpt and hlt. The only difference
+ between the two is the maximum immediate allowed - which is passed in
+ RANGE. */
static void
-do_t_bkpt (void)
+do_t_bkpt_hlt1 (int range)
{
constraint (inst.cond != COND_ALWAYS,
_("instruction is always unconditional"));
if (inst.operands[0].present)
{
- constraint (inst.operands[0].imm > 255,
+ constraint (inst.operands[0].imm > range,
_("immediate value out of range"));
inst.instruction |= inst.operands[0].imm;
- set_it_insn_type (NEUTRAL_IT_INSN);
}
+
+ set_it_insn_type (NEUTRAL_IT_INSN);
+}
+
+static void
+do_t_hlt (void)
+{
+ do_t_bkpt_hlt1 (63);
+}
+
+static void
+do_t_bkpt (void)
+{
+ do_t_bkpt_hlt1 (255);
}
static void
@@ -17974,7 +17990,9 @@ static const struct asm_opcode insns[] =
#define THUMB_VARIANT & arm_ext_v8
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
+ TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
+ /* ARMv8 T32 only. */
#undef ARM_VARIANT
#define ARM_VARIANT NULL
TUF("dcps1", 0, f78f8001, 0, (), noargs, noargs),
diff --git a/gas/testsuite/gas/arm/armv8-a-bad.l b/gas/testsuite/gas/arm/armv8-a-bad.l
index e96efce..d81e475 100644
--- a/gas/testsuite/gas/arm/armv8-a-bad.l
+++ b/gas/testsuite/gas/arm/armv8-a-bad.l
@@ -7,3 +7,8 @@
.*:14: Warning: This coprocessor register access is deprecated in ARMv8
.*:17: Warning: setend use is deprecated for ARMv8
.*:20: Warning: setend use is deprecated for ARMv8
+.*:24: Error: immediate value out of range -- `hlt 0x10000'
+.*:25: Error: instruction cannot be conditional -- `hltne 0x1'
+.*:29: Error: immediate value out of range -- `hlt 64'
+.*:31: Warning: it blocks containing 16-bit Thumb intsructions of the following class are deprecated in ARMv8: Miscellaneous 16-bit instructions
+.*:31: Error: instruction is always unconditional -- `hltne 0'
diff --git a/gas/testsuite/gas/arm/armv8-a-bad.s b/gas/testsuite/gas/arm/armv8-a-bad.s
index 33a3c17..cef9878 100644
--- a/gas/testsuite/gas/arm/armv8-a-bad.s
+++ b/gas/testsuite/gas/arm/armv8-a-bad.s
@@ -18,3 +18,14 @@
.thumb
setend le
+
+ // HLT A32
+ .arm
+ hlt 0x10000
+ hltne 0x1
+
+ // HLT T32
+ .thumb
+ hlt 64
+ it ne
+ hltne 0
diff --git a/gas/testsuite/gas/arm/armv8-a.d b/gas/testsuite/gas/arm/armv8-a.d
index 52fcf71..3f7b249 100644
--- a/gas/testsuite/gas/arm/armv8-a.d
+++ b/gas/testsuite/gas/arm/armv8-a.d
@@ -5,9 +5,14 @@
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> e320f005 sevl
+0[0-9a-f]+ <[^>]+> e1000070 hlt 0x0000
+0[0-9a-f]+ <[^>]+> e100007f hlt 0x000f
+0[0-9a-f]+ <[^>]+> e10fff70 hlt 0xfff0
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> f3af 8005 sevl.w
0[0-9a-f]+ <[^>]+> f78f 8001 dcps1
0[0-9a-f]+ <[^>]+> f78f 8002 dcps2
0[0-9a-f]+ <[^>]+> f78f 8003 dcps3
+0[0-9a-f]+ <[^>]+> ba80 hlt 0x0000
+0[0-9a-f]+ <[^>]+> babf hlt 0x003f
diff --git a/gas/testsuite/gas/arm/armv8-a.s b/gas/testsuite/gas/arm/armv8-a.s
index 4e097b1..89e7c5a 100644
--- a/gas/testsuite/gas/arm/armv8-a.s
+++ b/gas/testsuite/gas/arm/armv8-a.s
@@ -5,6 +5,9 @@
.arm
foo:
sevl
+ hlt 0x0
+ hlt 0xf
+ hlt 0xfff0
.thumb
.thumb_func
@@ -15,3 +18,5 @@ bar:
dcps1
dcps2
dcps3
+ hlt 0
+ hlt 63
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 6ee016f..754556c 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -851,6 +851,8 @@ static const struct opcode32 arm_opcodes[] =
/* V8 instructions. */
{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
+ {ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
+
/* Virtualization Extension instructions. */
{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
@@ -1249,6 +1251,7 @@ static const struct opcode16 thumb_opcodes[] =
/* ARM V8 instructions. */
{ARM_EXT_V8, 0xbf50, 0xffff, "sevl%c"},
+ {ARM_EXT_V8, 0xba80, 0xffc0, "hlt\t%0-5x"},
/* ARM V6K no-argument instructions. */
{ARM_EXT_V6K, 0xbf00, 0xffff, "nop%c"},