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Re: arm-eabi regressions from Re: mapping of stripped section syms
This refinement gets rid of unwanted .rela/.rel sections that caused
the arm failures, and others like .gnu.version_d that resulted in
vxworks testsuite failures.
ld/
* ldemul.c (before_allocation_default): Revert last change.
ldlang.c (lang_add_section): Likewise.
(strip_excluded_output_sections): Don't strip output sections with
user input sections when emitrelocations, unless all are SEC_EXCLUDE.
ld/testsuite/
* ld-powerpc/vxworks-relax.rd: Remove check on reloc section
file offset and reloc symbol indices.
Index: ld/ldemul.c
===================================================================
RCS file: /cvs/src/src/ld/ldemul.c,v
retrieving revision 1.39
diff -u -p -r1.39 ldemul.c
--- ld/ldemul.c 23 Mar 2012 09:35:34 -0000 1.39
+++ ld/ldemul.c 25 Mar 2012 02:08:33 -0000
@@ -237,7 +237,7 @@ after_allocation_default (void)
void
before_allocation_default (void)
{
- if (!link_info.relocatable && !link_info.emitrelocations)
+ if (!link_info.relocatable)
strip_excluded_output_sections ();
}
Index: ld/ldlang.c
===================================================================
RCS file: /cvs/src/src/ld/ldlang.c,v
retrieving revision 1.387
diff -u -p -r1.387 ldlang.c
--- ld/ldlang.c 23 Mar 2012 09:35:34 -0000 1.387
+++ ld/ldlang.c 25 Mar 2012 02:08:35 -0000
@@ -2380,7 +2380,6 @@ lang_add_section (lang_statement_list_ty
section->output_section = output->bfd_section;
if (!link_info.relocatable
- && !link_info.emitrelocations
&& !stripped_excluded_sections)
{
asection *s = output->bfd_section->map_tail.s;
@@ -3887,8 +3886,9 @@ strip_excluded_output_sections (void)
asection *s;
for (s = output_section->map_head.s; s != NULL; s = s->map_head.s)
- if ((s->flags & SEC_LINKER_CREATED) != 0
- && (s->flags & SEC_EXCLUDE) == 0)
+ if ((s->flags & SEC_EXCLUDE) == 0
+ && ((s->flags & SEC_LINKER_CREATED) != 0
+ || link_info.emitrelocations))
{
exclude = FALSE;
break;
Index: ld/testsuite/ld-powerpc/vxworks-relax.rd
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/vxworks-relax.rd,v
retrieving revision 1.1
diff -u -p -r1.1 vxworks-relax.rd
--- ld/testsuite/ld-powerpc/vxworks-relax.rd 26 Jan 2009 15:27:04 -0000 1.1
+++ ld/testsuite/ld-powerpc/vxworks-relax.rd 25 Mar 2012 02:08:36 -0000
@@ -1,9 +1,9 @@
-Relocation section '.rela.text' at offset 0x4010150 contains 6 entries:
+Relocation section '.rela.text' at offset .* contains 6 entries:
Offset Info Type Sym.Value Sym. Name \+ Addend
-00080012 00000106 R_PPC_ADDR16_HA 00080000 .text \+ 4000020
-00080016 00000104 R_PPC_ADDR16_LO 00080000 .text \+ 4000020
-00080006 00000106 R_PPC_ADDR16_HA 00080000 .text \+ 4000020
-0008000a 00000104 R_PPC_ADDR16_LO 00080000 .text \+ 4000020
-0408002a 00000306 R_PPC_ADDR16_HA 00080000 _start \+ 0
-0408002e 00000304 R_PPC_ADDR16_LO 00080000 _start \+ 0
+00080012 .* R_PPC_ADDR16_HA 00080000 .text \+ 4000020
+00080016 .* R_PPC_ADDR16_LO 00080000 .text \+ 4000020
+00080006 .* R_PPC_ADDR16_HA 00080000 .text \+ 4000020
+0008000a .* R_PPC_ADDR16_LO 00080000 .text \+ 4000020
+0408002a .* R_PPC_ADDR16_HA 00080000 _start \+ 0
+0408002e .* R_PPC_ADDR16_LO 00080000 _start \+ 0
--
Alan Modra
Australia Development Lab, IBM