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Re: [PATCH] microMIPS: Branch swapping support
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: "Maciej W. Rozycki" <macro at codesourcery dot com>
- Cc: binutils at sourceware dot org, Chao-ying Fu <fu at mips dot com>, Rich Fuhler <rich at mips dot com>, David Lau <davidlau at mips dot com>, Kevin Mills <kevinm at mips dot com>, Ilie Garbacea <ilie at mips dot com>, Catherine Moore <clm at codesourcery dot com>, Nathan Sidwell <nathan at codesourcery dot com>, Joseph Myers <joseph at codesourcery dot com>
- Date: Mon, 08 Aug 2011 22:16:03 +0100
- Subject: Re: [PATCH] microMIPS: Branch swapping support
- References: <alpine.DEB.1.10.1108021835260.4083@tp.orcam.me.uk> <87vcuaq0zp.fsf@firetop.home> <alpine.DEB.1.10.1108080120541.4083@tp.orcam.me.uk>
"Maciej W. Rozycki" <macro@codesourcery.com> writes:
> And as we've run out of pinfo bits, here's an update that brings
> INSN2_MOD_GPR_MF back, except that the opcode table now uses separate
> RD_mf and WR_mf macros, similarly to INSN2_MOD_GPR_MD vs RD_md/WR_md.
> This will make it easier to convert to separate pinfo bits if we ever get
> some more. The new arrangement penalises the short form of the NOT
> instruction (and some NOR cases that decay to same) that is now treated as
> if it read its destination register.
Yeah, I agree that's the best approach. The updated patch is OK, thanks.
Richard