PATCH: Set CIE data alignment to -4 for x32

["H.J. Lu" <hongjiu dot lu at intel dot com>]

Hi,

I checked in this patch to set CIE data alignment to -4 for x32.


H.J.
--
diff --git a/gas/ChangeLog b/gas/ChangeLog
index f53dd03..7688f52 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (x86_cie_stack_alignment): New.
+	(md_begin): Set x86_cie_data_alignment if it isn't set.  Set
+	x86_cie_stack_alignment.
+	(i386_target_format): Set x86_cie_data_alignment to -4 for x32.
+	(tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment
+	instead of x86_cie_data_alignment on SP and RA.
+
 2011-03-02  Nick Clifton  <nickc@redhat.com>
 
 	* ecoff.c: Incldue filenames.h
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 5cc8219..d278172 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -502,6 +502,9 @@ unsigned int x86_dwarf2_return_column;
 /* The dwarf2 data alignment, adjusted for 32 or 64 bit.  */
 int x86_cie_data_alignment;
 
+/* The dwarf2 stack alignment, adjusted for 32 or 64 bit.  */
+static int x86_cie_stack_alignment;
+
 /* Interface to relax_segment.
    There are 3 major relax states for 386 jump insns because the
    different types of jumps add different sizes to frags when we're
@@ -2378,12 +2381,15 @@ md_begin ()
 #else
       x86_dwarf2_return_column = 16;
 #endif
-      x86_cie_data_alignment = -8;
+      if (!x86_cie_data_alignment)
+	x86_cie_data_alignment = -8;
+      x86_cie_stack_alignment = -8;
     }
   else
     {
       x86_dwarf2_return_column = 8;
       x86_cie_data_alignment = -4;
+      x86_cie_stack_alignment = -4;
     }
 }
 
@@ -8636,6 +8642,7 @@ i386_target_format (void)
 	    use_rela_relocations = 1;
 	    object_64bit = 1;
 	    disallow_64bit_reloc = 1;
+	    x86_cie_data_alignment = -4;
 	    format = ELF_TARGET_FORMAT32;
 	    break;
 	  }
@@ -9045,8 +9052,8 @@ tc_x86_frame_initial_instructions (void)
       input_line_pointer = saved_input;
     }
 
-  cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_data_alignment);
-  cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_data_alignment);
+  cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_stack_alignment);
+  cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_stack_alignment);
 }
 
 int
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c4fbd0a..56b8823 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
+
 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction
diff --git a/gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d b/gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d
index f1aa45e..27dd2f5 100644
--- a/gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d
+++ b/gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d
@@ -7,7 +7,7 @@ Contents of the .eh_frame section:
   Version:               1
   Augmentation:          "zR"
   Code alignment factor: 1
-  Data alignment factor: -8
+  Data alignment factor: -4
   Return address column: 16
   Augmentation data:     1b
 
@@ -55,7 +55,7 @@ Contents of the .eh_frame section:
   Version:               1
   Augmentation:          "zR"
   Code alignment factor: 1
-  Data alignment factor: -8
+  Data alignment factor: -4
   Return address column: 16
   Augmentation data:     1b
 
@@ -88,7 +88,7 @@ Contents of the .eh_frame section:
   Version:               1
   Augmentation:          "zR"
   Code alignment factor: 1
-  Data alignment factor: -8
+  Data alignment factor: -4
   Return address column: 16
   Augmentation data:     1b