[PATCH 3/8] add eieio for e500

[Sebastian Andrzej Siewior <sebastian at breakpoint dot cc>]

eieio is only specified in Book-S. Book-E's mbar has the same opcode as eieio.
According to the ISA eieio is a subset of mbar 0, thus mbar is stronger.
The ISA lets mbar with MO != 0 up to the actual implementation. The reference
manual for e500 says that MO == 1 behaves exactly like eieio in Book-S.
This patch turns eieio into mbar 1 if assembling for e500 is specified.

Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
---
 include/opcode/ppc.h |    3 +++
 opcodes/ppc-dis.c    |    6 ++++--
 opcodes/ppc-opc.c    |    5 +++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index e6dab7e..2d99cd4 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -177,6 +177,9 @@ extern const int powerpc_num_opcodes;
 /* Opcode is supported by AppliedMicro Titan core */
 #define PPC_OPCODE_TITAN         0x400000000ULL
 
+/* Opcode which is supported by the e500 family */
+#define PPC_OPCODE_E500		0x800000000ULL
+
 /* A macro to extract the major opcode from an instruction.  */
 #define PPC_OP(i) (((i) >> 26) & 0x3f)
 
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 21d1930..1fb40ee 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -111,7 +111,8 @@ struct ppc_mopt ppc_opts[] = {
     0 },
   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 		| PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
-		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI),
+		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		| PPC_OPCODE_E500),
     0 },
   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
@@ -124,7 +125,8 @@ struct ppc_mopt ppc_opts[] = {
     0 },
   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 		| PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
-		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI),
+		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		| PPC_OPCODE_E500),
     0 },
   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
     0 },
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 1b3e344..2a01582 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -1781,6 +1781,9 @@ extract_dm (unsigned long insn,
 /* An XL_MASK with the BO, BI and BB fields fixed.  */
 #define XLBOBIBB_MASK (XL_MASK | BO_MASK | BI_MASK | BB_MASK)
 
+/* An X form mbar instruction with MO field.  */
+#define XMBAR(op, xop, mo) (X ((op), (xop)) | ((((unsigned long)(mo)) & 1) << 21))
+
 /* An XO form instruction.  */
 #define XO(op, xop, oe, rc) \
   (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1) | ((((unsigned long)(oe)) & 1) << 10) | (((unsigned long)(rc)) & 1))
@@ -1942,6 +1945,7 @@ extract_dm (unsigned long insn,
 #define PPCA2	PPC_OPCODE_A2
 #define TITAN   PPC_OPCODE_TITAN  
 #define MULHW   PPC_OPCODE_405 | PPC_OPCODE_440 | TITAN
+#define E500	PPC_OPCODE_E500
 
 /* The opcode table.
 
@@ -4665,6 +4669,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 
 {"eieio",	X(31,854),	0xffffffff,  PPC,   BOOKE|PPCA2|PPC476,	{0}},
 {"mbar",	X(31,854),	X_MASK, BOOKE|PPCA2|PPC476, PPCNONE,	{MO}},
+{"eieio",	XMBAR(31,854,1),0xffffffff,  E500,   PPCNONE,	{0}},
 {"eieio",	X(31,854),	0xffffffff, PPCA2|PPC476, PPCNONE,	{0}},
 
 {"lfiwax",	X(31,855),	X_MASK, POWER6|PPCA2|PPC476, PPCNONE,	{FRT, RA0, RB}},
-- 
1.7.1