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ARMv7E-M support
- From: Paul Brook <paul at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Tue, 17 Nov 2009 16:31:20 +0000
- Subject: ARMv7E-M support
The attached patch adds ARMv7E-M architecture support.
This is ARMv7-M with most of the ARMv6 instructions added back in.
Tested on arm-none-eabi.
Applied to CVS head.
Paul
2009-11-17 Paul Brook <paul@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* doc/c-arm.texi: Document .arch armv7e-m.
* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
(insns): Put Thumb versions of v5TExP instructions into
arm_ext_v5exp also. Move some Thumb variants from
arm_ext_v6_notm to arm_ext_v6_dsp.
(arm_archs): Add armv7e-m architecture.
(aeabi_set_public_attributes): Handle -march=armv7e-m.
gas/testsuite/
* gas/arm/attr-march-armv7em.d: New test.
* gas/arm/arch7em-bad.d: New test.
* gas/arm/arch7em-bad.l: New test.
* gas/arm/arch7em.d: New test.
* gas/arm/arch7em.s: New test.
include/elf/
* arm.h (TAG_CPU_ARCH_V7E_M): Define.
include/opcode/
* arm.h (ARM_EXT_V6_DSP): Define.
(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.
bfd/
* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
Index: gas/doc/c-arm.texi
===================================================================
--- gas/doc/c-arm.texi (revision 268577)
+++ gas/doc/c-arm.texi (working copy)
@@ -168,6 +168,7 @@ names are recognized:
@code{armv7-a},
@code{armv7-r},
@code{armv7-m},
+@code{armv7e-m},
@code{iwmmxt}
and
@code{xscale}.
Index: gas/testsuite/gas/arm/attr-march-armv7em.d
===================================================================
--- gas/testsuite/gas/arm/attr-march-armv7em.d (revision 0)
+++ gas/testsuite/gas/arm/attr-march-armv7em.d (revision 0)
@@ -0,0 +1,13 @@
+# name: attributes for -march=armv7e-m
+# source: blank.s
+# as: -march=armv7e-m
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi
+
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "7E-M"
+ Tag_CPU_arch: v7E-M
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Thumb-2
Index: gas/testsuite/gas/arm/arch7em-bad.d
===================================================================
--- gas/testsuite/gas/arm/arch7em-bad.d (revision 0)
+++ gas/testsuite/gas/arm/arch7em-bad.d (revision 0)
@@ -0,0 +1,4 @@
+#name: Valid v7E-M, invalid v7-M
+#as: -march=armv7-m
+#source: arch7em.s
+#error-output: arch7em-bad.l
Index: gas/testsuite/gas/arm/arch7em-bad.l
===================================================================
--- gas/testsuite/gas/arm/arch7em-bad.l (revision 0)
+++ gas/testsuite/gas/arm/arch7em-bad.l (revision 0)
@@ -0,0 +1,132 @@
+[^:]*: Assembler messages:
+[^:]*:8: Error: selected processor does not support `pkhbt r0,r0,r0'
+[^:]*:9: Error: selected processor does not support `pkhbt r9,r0,r0'
+[^:]*:10: Error: selected processor does not support `pkhbt r0,r9,r0'
+[^:]*:11: Error: selected processor does not support `pkhbt r0,r0,r9'
+[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#0x14'
+[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#3'
+[^:]*:14: Error: selected processor does not support `pkhtb r1,r2,r3'
+[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr#0x11'
+[^:]*:18: Error: selected processor does not support `qadd r1,r2,r3'
+[^:]*:19: Error: selected processor does not support `qadd16 r1,r2,r3'
+[^:]*:20: Error: selected processor does not support `qadd8 r1,r2,r3'
+[^:]*:21: Error: selected processor does not support `qasx r1,r2,r3'
+[^:]*:22: Error: selected processor does not support `qaddsubx r1,r2,r3'
+[^:]*:23: Error: selected processor does not support `qdadd r1,r2,r3'
+[^:]*:24: Error: selected processor does not support `qdsub r1,r2,r3'
+[^:]*:25: Error: selected processor does not support `qsub r1,r2,r3'
+[^:]*:26: Error: selected processor does not support `qsub16 r1,r2,r3'
+[^:]*:27: Error: selected processor does not support `qsub8 r1,r2,r3'
+[^:]*:28: Error: selected processor does not support `qsax r1,r2,r3'
+[^:]*:29: Error: selected processor does not support `qsubaddx r1,r2,r3'
+[^:]*:30: Error: selected processor does not support `sadd16 r1,r2,r3'
+[^:]*:31: Error: selected processor does not support `sadd8 r1,r2,r3'
+[^:]*:32: Error: selected processor does not support `sasx r1,r2,r3'
+[^:]*:33: Error: selected processor does not support `saddsubx r1,r2,r3'
+[^:]*:34: Error: selected processor does not support `ssub16 r1,r2,r3'
+[^:]*:35: Error: selected processor does not support `ssub8 r1,r2,r3'
+[^:]*:36: Error: selected processor does not support `ssax r1,r2,r3'
+[^:]*:37: Error: selected processor does not support `ssubaddx r1,r2,r3'
+[^:]*:38: Error: selected processor does not support `shadd16 r1,r2,r3'
+[^:]*:39: Error: selected processor does not support `shadd8 r1,r2,r3'
+[^:]*:40: Error: selected processor does not support `shasx r1,r2,r3'
+[^:]*:41: Error: selected processor does not support `shaddsubx r1,r2,r3'
+[^:]*:42: Error: selected processor does not support `shsub16 r1,r2,r3'
+[^:]*:43: Error: selected processor does not support `shsub8 r1,r2,r3'
+[^:]*:44: Error: selected processor does not support `shsax r1,r2,r3'
+[^:]*:45: Error: selected processor does not support `shsubaddx r1,r2,r3'
+[^:]*:46: Error: selected processor does not support `uadd16 r1,r2,r3'
+[^:]*:47: Error: selected processor does not support `uadd8 r1,r2,r3'
+[^:]*:48: Error: selected processor does not support `uasx r1,r2,r3'
+[^:]*:49: Error: selected processor does not support `uaddsubx r1,r2,r3'
+[^:]*:50: Error: selected processor does not support `usub16 r1,r2,r3'
+[^:]*:51: Error: selected processor does not support `usub8 r1,r2,r3'
+[^:]*:52: Error: selected processor does not support `usax r1,r2,r3'
+[^:]*:53: Error: selected processor does not support `usubaddx r1,r2,r3'
+[^:]*:54: Error: selected processor does not support `uhadd16 r1,r2,r3'
+[^:]*:55: Error: selected processor does not support `uhadd8 r1,r2,r3'
+[^:]*:56: Error: selected processor does not support `uhasx r1,r2,r3'
+[^:]*:57: Error: selected processor does not support `uhaddsubx r1,r2,r3'
+[^:]*:58: Error: selected processor does not support `uhsub16 r1,r2,r3'
+[^:]*:59: Error: selected processor does not support `uhsub8 r1,r2,r3'
+[^:]*:60: Error: selected processor does not support `uhsax r1,r2,r3'
+[^:]*:61: Error: selected processor does not support `uhsubaddx r1,r2,r3'
+[^:]*:62: Error: selected processor does not support `uqadd16 r1,r2,r3'
+[^:]*:63: Error: selected processor does not support `uqadd8 r1,r2,r3'
+[^:]*:64: Error: selected processor does not support `uqasx r1,r2,r3'
+[^:]*:65: Error: selected processor does not support `uqaddsubx r1,r2,r3'
+[^:]*:66: Error: selected processor does not support `uqsub16 r1,r2,r3'
+[^:]*:67: Error: selected processor does not support `uqsub8 r1,r2,r3'
+[^:]*:68: Error: selected processor does not support `uqsax r1,r2,r3'
+[^:]*:69: Error: selected processor does not support `uqsubaddx r1,r2,r3'
+[^:]*:70: Error: selected processor does not support `sel r1,r2,r3'
+[^:]*:73: Error: selected processor does not support `smlabb r0,r0,r0,r0'
+[^:]*:74: Error: selected processor does not support `smlabb r9,r0,r0,r0'
+[^:]*:75: Error: selected processor does not support `smlabb r0,r9,r0,r0'
+[^:]*:76: Error: selected processor does not support `smlabb r0,r0,r9,r0'
+[^:]*:77: Error: selected processor does not support `smlabb r0,r0,r0,r9'
+[^:]*:79: Error: selected processor does not support `smlatb r0,r0,r0,r0'
+[^:]*:80: Error: selected processor does not support `smlabt r0,r0,r0,r0'
+[^:]*:81: Error: selected processor does not support `smlatt r0,r0,r0,r0'
+[^:]*:82: Error: selected processor does not support `smlawb r0,r0,r0,r0'
+[^:]*:83: Error: selected processor does not support `smlawt r0,r0,r0,r0'
+[^:]*:84: Error: selected processor does not support `smlad r0,r0,r0,r0'
+[^:]*:85: Error: selected processor does not support `smladx r0,r0,r0,r0'
+[^:]*:86: Error: selected processor does not support `smlsd r0,r0,r0,r0'
+[^:]*:87: Error: selected processor does not support `smlsdx r0,r0,r0,r0'
+[^:]*:88: Error: selected processor does not support `smmla r0,r0,r0,r0'
+[^:]*:89: Error: selected processor does not support `smmlar r0,r0,r0,r0'
+[^:]*:90: Error: selected processor does not support `smmls r0,r0,r0,r0'
+[^:]*:91: Error: selected processor does not support `smmlsr r0,r0,r0,r0'
+[^:]*:92: Error: selected processor does not support `usada8 r0,r0,r0,r0'
+[^:]*:95: Error: selected processor does not support `smlalbb r0,r0,r0,r0'
+[^:]*:96: Error: selected processor does not support `smlalbb r9,r0,r0,r0'
+[^:]*:97: Error: selected processor does not support `smlalbb r0,r9,r0,r0'
+[^:]*:98: Error: selected processor does not support `smlalbb r0,r0,r9,r0'
+[^:]*:99: Error: selected processor does not support `smlalbb r0,r0,r0,r9'
+[^:]*:101: Error: selected processor does not support `smlaltb r0,r0,r0,r0'
+[^:]*:102: Error: selected processor does not support `smlalbt r0,r0,r0,r0'
+[^:]*:103: Error: selected processor does not support `smlaltt r0,r0,r0,r0'
+[^:]*:104: Error: selected processor does not support `smlald r0,r0,r0,r0'
+[^:]*:105: Error: selected processor does not support `smlaldx r0,r0,r0,r0'
+[^:]*:106: Error: selected processor does not support `smlsld r0,r0,r0,r0'
+[^:]*:107: Error: selected processor does not support `smlsldx r0,r0,r0,r0'
+[^:]*:108: Error: selected processor does not support `umaal r0,r0,r0,r0'
+[^:]*:111: Error: selected processor does not support `smulbb r0,r0,r0'
+[^:]*:112: Error: selected processor does not support `smulbb r9,r0,r0'
+[^:]*:113: Error: selected processor does not support `smulbb r0,r9,r0'
+[^:]*:114: Error: selected processor does not support `smulbb r0,r0,r9'
+[^:]*:116: Error: selected processor does not support `smultb r0,r0,r0'
+[^:]*:117: Error: selected processor does not support `smulbt r0,r0,r0'
+[^:]*:118: Error: selected processor does not support `smultt r0,r0,r0'
+[^:]*:119: Error: selected processor does not support `smulwb r0,r0,r0'
+[^:]*:120: Error: selected processor does not support `smulwt r0,r0,r0'
+[^:]*:121: Error: selected processor does not support `smmul r0,r0,r0'
+[^:]*:122: Error: selected processor does not support `smmulr r0,r0,r0'
+[^:]*:123: Error: selected processor does not support `smuad r0,r0,r0'
+[^:]*:124: Error: selected processor does not support `smuadx r0,r0,r0'
+[^:]*:125: Error: selected processor does not support `smusd r0,r0,r0'
+[^:]*:126: Error: selected processor does not support `smusdx r0,r0,r0'
+[^:]*:127: Error: selected processor does not support `usad8 r0,r0,r0'
+[^:]*:130: Error: selected processor does not support `ssat16 r0,#1,r0'
+[^:]*:131: Error: selected processor does not support `ssat16 r9,#1,r0'
+[^:]*:132: Error: selected processor does not support `ssat16 r0,#10,r0'
+[^:]*:133: Error: selected processor does not support `ssat16 r0,#1,r9'
+[^:]*:135: Error: selected processor does not support `usat16 r0,#0,r0'
+[^:]*:136: Error: selected processor does not support `usat16 r9,#0,r0'
+[^:]*:137: Error: selected processor does not support `usat16 r0,#9,r0'
+[^:]*:138: Error: selected processor does not support `usat16 r0,#0,r9'
+[^:]*:141: Error: selected processor does not support `sxtb16 r1,r2'
+[^:]*:142: Error: selected processor does not support `sxtb16 r8,r9'
+[^:]*:143: Error: selected processor does not support `uxtb16 r1,r2'
+[^:]*:144: Error: selected processor does not support `uxtb16 r8,r9'
+[^:]*:147: Error: selected processor does not support `sxtab r0,r0,r0'
+[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror#0'
+[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror#8'
+[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror#16'
+[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror#24'
+[^:]*:153: Error: selected processor does not support `sxtab16 r1,r2,r3'
+[^:]*:154: Error: selected processor does not support `sxtah r1,r2,r3'
+[^:]*:155: Error: selected processor does not support `uxtab r1,r2,r3'
+[^:]*:156: Error: selected processor does not support `uxtab16 r1,r2,r3'
+[^:]*:157: Error: selected processor does not support `uxtah r1,r2,r3'
Index: gas/testsuite/gas/arm/arch7em.d
===================================================================
--- gas/testsuite/gas/arm/arch7em.d (revision 0)
+++ gas/testsuite/gas/arm/arch7em.d (revision 0)
@@ -0,0 +1,138 @@
+# name: 32-bit Thumb DSP instructions
+# as: -march=armv7e-m
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> eac0 0000 pkhbt r0, r0, r0
+0[0-9a-f]+ <[^>]+> eac0 0900 pkhbt r9, r0, r0
+0[0-9a-f]+ <[^>]+> eac9 0000 pkhbt r0, r9, r0
+0[0-9a-f]+ <[^>]+> eac0 0009 pkhbt r0, r0, r9
+0[0-9a-f]+ <[^>]+> eac0 5000 pkhbt r0, r0, r0, lsl #20
+0[0-9a-f]+ <[^>]+> eac0 00c0 pkhbt r0, r0, r0, lsl #3
+0[0-9a-f]+ <[^>]+> eac3 0102 pkhbt r1, r3, r2
+0[0-9a-f]+ <[^>]+> eac2 4163 pkhtb r1, r2, r3, asr #17
+0[0-9a-f]+ <[^>]+> fa82 f183 qadd r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f113 qadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f113 qadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 qaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 qaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f193 qdadd r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f1b3 qdsub r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f1a3 qsub r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f113 qsub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f113 qsub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 qsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 qsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f103 sadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f103 sadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 saddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 saddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f103 ssub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f103 ssub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 ssubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 ssubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f123 shadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f123 shadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 shaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 shaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f123 shsub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f123 shsub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 shsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 shsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f143 uadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f143 uadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 uaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 uaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f143 usub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f143 usub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 usubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 usubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f163 uhadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f163 uhadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 uhaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 uhaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f163 uhsub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f163 uhsub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 uhsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 uhsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa92 f153 uqadd16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa82 f153 uqadd8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 uqaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 uqaddsubx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fad2 f153 uqsub16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fac2 f153 uqsub8 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 uqsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 uqsubaddx r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f183 sel r1, r2, r3
+0[0-9a-f]+ <[^>]+> fb10 0000 smlabb r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 0900 smlabb r9, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb19 0000 smlabb r0, r9, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 0009 smlabb r0, r0, r9, r0
+0[0-9a-f]+ <[^>]+> fb10 9000 smlabb r0, r0, r0, r9
+0[0-9a-f]+ <[^>]+> fb10 0020 smlatb r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 0010 smlabt r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 0030 smlatt r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb30 0000 smlawb r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb30 0010 smlawt r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb20 0000 smlad r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb20 0010 smladx r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb40 0000 smlsd r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb40 0010 smlsdx r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb50 0000 smmla r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb50 0010 smmlar r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb60 0000 smmls r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb60 0010 smmlsr r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb70 0000 usada8 r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 0080 smlalbb r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 9080 smlalbb r9, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 0980 smlalbb r0, r9, r0, r0
+0[0-9a-f]+ <[^>]+> fbc9 0080 smlalbb r0, r0, r9, r0
+0[0-9a-f]+ <[^>]+> fbc0 0089 smlalbb r0, r0, r0, r9
+0[0-9a-f]+ <[^>]+> fbc0 00a0 smlaltb r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 0090 smlalbt r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 00b0 smlaltt r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 00c0 smlald r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbc0 00d0 smlaldx r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbd0 00c0 smlsld r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbd0 00d0 smlsldx r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fbe0 0060 umaal r0, r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 f000 smulbb r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 f900 smulbb r9, r0, r0
+0[0-9a-f]+ <[^>]+> fb19 f000 smulbb r0, r9, r0
+0[0-9a-f]+ <[^>]+> fb10 f009 smulbb r0, r0, r9
+0[0-9a-f]+ <[^>]+> fb10 f020 smultb r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 f010 smulbt r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb10 f030 smultt r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb30 f000 smulwb r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb30 f010 smulwt r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb50 f000 smmul r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb50 f010 smmulr r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb20 f000 smuad r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb20 f010 smuadx r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb40 f000 smusd r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb40 f010 smusdx r0, r0, r0
+0[0-9a-f]+ <[^>]+> fb70 f000 usad8 r0, r0, r0
+0[0-9a-f]+ <[^>]+> f320 0000 ssat16 r0, #0, r0
+0[0-9a-f]+ <[^>]+> f320 0900 ssat16 r9, #0, r0
+0[0-9a-f]+ <[^>]+> f320 0009 ssat16 r0, #9, r0
+0[0-9a-f]+ <[^>]+> f329 0000 ssat16 r0, #0, r9
+0[0-9a-f]+ <[^>]+> f3a0 0000 usat16 r0, #0, r0
+0[0-9a-f]+ <[^>]+> f3a0 0900 usat16 r9, #0, r0
+0[0-9a-f]+ <[^>]+> f3a0 0009 usat16 r0, #9, r0
+0[0-9a-f]+ <[^>]+> f3a9 0000 usat16 r0, #0, r9
+0[0-9a-f]+ <[^>]+> fa2f f182 sxtb16 r1, r2
+0[0-9a-f]+ <[^>]+> fa2f f889 sxtb16 r8, r9
+0[0-9a-f]+ <[^>]+> fa3f f182 uxtb16 r1, r2
+0[0-9a-f]+ <[^>]+> fa3f f889 uxtb16 r8, r9
+0[0-9a-f]+ <[^>]+> fa40 f080 sxtab r0, r0, r0
+0[0-9a-f]+ <[^>]+> fa40 f080 sxtab r0, r0, r0
+0[0-9a-f]+ <[^>]+> fa40 f990 sxtab r9, r0, r0, ror #8
+0[0-9a-f]+ <[^>]+> fa49 f0a0 sxtab r0, r9, r0, ror #16
+0[0-9a-f]+ <[^>]+> fa40 f0b9 sxtab r0, r0, r9, ror #24
+0[0-9a-f]+ <[^>]+> fa22 f183 sxtab16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa02 f183 sxtah r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa52 f183 uxtab r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3
+0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3
Index: gas/testsuite/gas/arm/arch7em.s
===================================================================
--- gas/testsuite/gas/arm/arch7em.s (revision 0)
+++ gas/testsuite/gas/arm/arch7em.s (revision 0)
@@ -0,0 +1,157 @@
+# Instructions included in v7E-M architecture over v7-M.
+
+ .text
+ .thumb
+ .syntax unified
+
+pkh:
+ pkhbt r0, r0, r0
+ pkhbt r9, r0, r0
+ pkhbt r0, r9, r0
+ pkhbt r0, r0, r9
+ pkhbt r0, r0, r0, lsl #0x14
+ pkhbt r0, r0, r0, lsl #3
+ pkhtb r1, r2, r3
+ pkhtb r1, r2, r3, asr #0x11
+
+qadd:
+ qadd r1, r2, r3
+ qadd16 r1, r2, r3
+ qadd8 r1, r2, r3
+ qasx r1, r2, r3
+ qaddsubx r1, r2, r3
+ qdadd r1, r2, r3
+ qdsub r1, r2, r3
+ qsub r1, r2, r3
+ qsub16 r1, r2, r3
+ qsub8 r1, r2, r3
+ qsax r1, r2, r3
+ qsubaddx r1, r2, r3
+ sadd16 r1, r2, r3
+ sadd8 r1, r2, r3
+ sasx r1, r2, r3
+ saddsubx r1, r2, r3
+ ssub16 r1, r2, r3
+ ssub8 r1, r2, r3
+ ssax r1, r2, r3
+ ssubaddx r1, r2, r3
+ shadd16 r1, r2, r3
+ shadd8 r1, r2, r3
+ shasx r1, r2, r3
+ shaddsubx r1, r2, r3
+ shsub16 r1, r2, r3
+ shsub8 r1, r2, r3
+ shsax r1, r2, r3
+ shsubaddx r1, r2, r3
+ uadd16 r1, r2, r3
+ uadd8 r1, r2, r3
+ uasx r1, r2, r3
+ uaddsubx r1, r2, r3
+ usub16 r1, r2, r3
+ usub8 r1, r2, r3
+ usax r1, r2, r3
+ usubaddx r1, r2, r3
+ uhadd16 r1, r2, r3
+ uhadd8 r1, r2, r3
+ uhasx r1, r2, r3
+ uhaddsubx r1, r2, r3
+ uhsub16 r1, r2, r3
+ uhsub8 r1, r2, r3
+ uhsax r1, r2, r3
+ uhsubaddx r1, r2, r3
+ uqadd16 r1, r2, r3
+ uqadd8 r1, r2, r3
+ uqasx r1, r2, r3
+ uqaddsubx r1, r2, r3
+ uqsub16 r1, r2, r3
+ uqsub8 r1, r2, r3
+ uqsax r1, r2, r3
+ uqsubaddx r1, r2, r3
+ sel r1, r2, r3
+
+smla:
+ smlabb r0, r0, r0, r0
+ smlabb r9, r0, r0, r0
+ smlabb r0, r9, r0, r0
+ smlabb r0, r0, r9, r0
+ smlabb r0, r0, r0, r9
+
+ smlatb r0, r0, r0, r0
+ smlabt r0, r0, r0, r0
+ smlatt r0, r0, r0, r0
+ smlawb r0, r0, r0, r0
+ smlawt r0, r0, r0, r0
+ smlad r0, r0, r0, r0
+ smladx r0, r0, r0, r0
+ smlsd r0, r0, r0, r0
+ smlsdx r0, r0, r0, r0
+ smmla r0, r0, r0, r0
+ smmlar r0, r0, r0, r0
+ smmls r0, r0, r0, r0
+ smmlsr r0, r0, r0, r0
+ usada8 r0, r0, r0, r0
+
+smlal:
+ smlalbb r0, r0, r0, r0
+ smlalbb r9, r0, r0, r0
+ smlalbb r0, r9, r0, r0
+ smlalbb r0, r0, r9, r0
+ smlalbb r0, r0, r0, r9
+
+ smlaltb r0, r0, r0, r0
+ smlalbt r0, r0, r0, r0
+ smlaltt r0, r0, r0, r0
+ smlald r0, r0, r0, r0
+ smlaldx r0, r0, r0, r0
+ smlsld r0, r0, r0, r0
+ smlsldx r0, r0, r0, r0
+ umaal r0, r0, r0, r0
+
+smul:
+ smulbb r0, r0, r0
+ smulbb r9, r0, r0
+ smulbb r0, r9, r0
+ smulbb r0, r0, r9
+
+ smultb r0, r0, r0
+ smulbt r0, r0, r0
+ smultt r0, r0, r0
+ smulwb r0, r0, r0
+ smulwt r0, r0, r0
+ smmul r0, r0, r0
+ smmulr r0, r0, r0
+ smuad r0, r0, r0
+ smuadx r0, r0, r0
+ smusd r0, r0, r0
+ smusdx r0, r0, r0
+ usad8 r0, r0, r0
+
+sat:
+ ssat16 r0, #1, r0
+ ssat16 r9, #1, r0
+ ssat16 r0, #10, r0
+ ssat16 r0, #1, r9
+
+ usat16 r0, #0, r0
+ usat16 r9, #0, r0
+ usat16 r0, #9, r0
+ usat16 r0, #0, r9
+
+xt:
+ sxtb16 r1, r2
+ sxtb16 r8, r9
+ uxtb16 r1, r2
+ uxtb16 r8, r9
+
+xta:
+ sxtab r0, r0, r0
+ sxtab r0, r0, r0, ror #0
+ sxtab r9, r0, r0, ror #8
+ sxtab r0, r9, r0, ror #16
+ sxtab r0, r0, r9, ror #24
+
+ sxtab16 r1, r2, r3
+ sxtah r1, r2, r3
+ uxtab r1, r2, r3
+ uxtab16 r1, r2, r3
+ uxtah r1, r2, r3
Index: gas/config/tc-arm.c
===================================================================
--- gas/config/tc-arm.c (revision 268577)
+++ gas/config/tc-arm.c (working copy)
@@ -188,12 +188,14 @@ static const arm_feature_set arm_ext_v6k
static const arm_feature_set arm_ext_v6z = ARM_FEATURE (ARM_EXT_V6Z, 0);
static const arm_feature_set arm_ext_v6t2 = ARM_FEATURE (ARM_EXT_V6T2, 0);
static const arm_feature_set arm_ext_v6_notm = ARM_FEATURE (ARM_EXT_V6_NOTM, 0);
+static const arm_feature_set arm_ext_v6_dsp = ARM_FEATURE (ARM_EXT_V6_DSP, 0);
static const arm_feature_set arm_ext_barrier = ARM_FEATURE (ARM_EXT_BARRIER, 0);
static const arm_feature_set arm_ext_msr = ARM_FEATURE (ARM_EXT_THUMB_MSR, 0);
static const arm_feature_set arm_ext_div = ARM_FEATURE (ARM_EXT_DIV, 0);
static const arm_feature_set arm_ext_v7 = ARM_FEATURE (ARM_EXT_V7, 0);
static const arm_feature_set arm_ext_v7a = ARM_FEATURE (ARM_EXT_V7A, 0);
static const arm_feature_set arm_ext_v7r = ARM_FEATURE (ARM_EXT_V7R, 0);
+static const arm_feature_set arm_ext_v7m = ARM_FEATURE (ARM_EXT_V7M, 0);
static const arm_feature_set arm_ext_m =
ARM_FEATURE (ARM_EXT_V6M | ARM_EXT_V7M, 0);
@@ -16468,6 +16470,8 @@ static const struct asm_opcode insns[] =
#undef ARM_VARIANT
#define ARM_VARIANT & arm_ext_v5exp /* ARM Architecture 5TExP. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_v5exp
TCE("smlabb", 1000080, fb100000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
TCE("smlatb", 10000a0, fb100020, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
@@ -16497,6 +16501,8 @@ static const struct asm_opcode insns[] =
#undef ARM_VARIANT
#define ARM_VARIANT & arm_ext_v5e /* ARM Architecture 5TE. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_v6t2
TUF("pld", 450f000, f810f000, 1, (ADDR), pld, t_pld),
TC3("ldrd", 00000d0, e8500000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd),
@@ -16537,10 +16543,25 @@ static const struct asm_opcode insns[] =
TCE("ssat", 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
TCE("usat", 6e00010, f3800000, 4, (RRnpc, I31, RRnpc, oSHllar),usat, t_usat),
-/* ARM V6 not included in V7M (eg. integer SIMD). */
+/* ARM V6 not included in V7M. */
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v6_notm
+ TUF("rfeia", 8900a00, e990c000, 1, (RRw), rfe, rfe),
+ UF(rfeib, 9900a00, 1, (RRw), rfe),
+ UF(rfeda, 8100a00, 1, (RRw), rfe),
+ TUF("rfedb", 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ TUF("rfefd", 8900a00, e990c000, 1, (RRw), rfe, rfe),
+ UF(rfefa, 9900a00, 1, (RRw), rfe),
+ UF(rfeea, 8100a00, 1, (RRw), rfe),
+ TUF("rfeed", 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ TUF("srsia", 8c00500, e980c000, 2, (oRRw, I31w), srs, srs),
+ UF(srsib, 9c00500, 2, (oRRw, I31w), srs),
+ UF(srsda, 8400500, 2, (oRRw, I31w), srs),
+ TUF("srsdb", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
+/* ARM V6 not included in V7M (eg. integer SIMD). */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT & arm_ext_v6_dsp
TUF("cps", 1020000, f3af8100, 1, (I31b), imm0, t_cps),
TCE("pkhbt", 6800010, eac00000, 4, (RRnpc, RRnpc, RRnpc, oSHll), pkhbt, t_pkhbt),
TCE("pkhtb", 6800050, eac00020, 4, (RRnpc, RRnpc, RRnpc, oSHar), pkhtb, t_pkhtb),
@@ -16604,14 +16625,6 @@ static const struct asm_opcode insns[] =
/* Old name for USAX. */
TCE("usubaddx", 6500f50, fae0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
TCE("usub8", 6500ff0, fac0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
- TUF("rfeia", 8900a00, e990c000, 1, (RRw), rfe, rfe),
- UF(rfeib, 9900a00, 1, (RRw), rfe),
- UF(rfeda, 8100a00, 1, (RRw), rfe),
- TUF("rfedb", 9100a00, e810c000, 1, (RRw), rfe, rfe),
- TUF("rfefd", 8900a00, e990c000, 1, (RRw), rfe, rfe),
- UF(rfefa, 9900a00, 1, (RRw), rfe),
- UF(rfeea, 8100a00, 1, (RRw), rfe),
- TUF("rfeed", 9100a00, e810c000, 1, (RRw), rfe, rfe),
TCE("sxtah", 6b00070, fa00f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
TCE("sxtab16", 6800070, fa20f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
TCE("sxtab", 6a00070, fa40f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
@@ -16639,10 +16652,6 @@ static const struct asm_opcode insns[] =
TCE("smuadx", 700f030, fb20f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
TCE("smusd", 700f050, fb40f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
TCE("smusdx", 700f070, fb40f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
- TUF("srsia", 8c00500, e980c000, 2, (oRRw, I31w), srs, srs),
- UF(srsib, 9c00500, 2, (oRRw, I31w), srs),
- UF(srsda, 8400500, 2, (oRRw, I31w), srs),
- TUF("srsdb", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
TCE("ssat16", 6a00f30, f3200000, 3, (RRnpc, I16, RRnpc), ssat16, t_ssat16),
TCE("umaal", 0400090, fbe00060, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal, t_mlal),
TCE("usad8", 780f010, fb70f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
@@ -22034,6 +22043,7 @@ static const struct arm_arch_option_tabl
{"armv7-a", ARM_ARCH_V7A, FPU_ARCH_VFP},
{"armv7-r", ARM_ARCH_V7R, FPU_ARCH_VFP},
{"armv7-m", ARM_ARCH_V7M, FPU_ARCH_VFP},
+ {"armv7e-m", ARM_ARCH_V7EM, FPU_ARCH_VFP},
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP},
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP},
{"iwmmxt2", ARM_ARCH_IWMMXT2,FPU_ARCH_VFP},
@@ -22555,6 +22565,20 @@ aeabi_set_public_attributes (void)
}
}
+ /* The table lookup above finds the last architecture to contribute
+ a new feature. Unfortunately, Tag13 is a subset of the union of
+ v6T2 and v7-M, so it is never seen as contributing a new feature.
+ We can not search for the last entry which is entirely used,
+ because if no CPU is specified we build up only those flags
+ actually used. Perhaps we should separate out the specified
+ and implicit cases. Avoid taking this path for -march=all by
+ checking for contradictory v7-A / v7-M features. */
+ if (arch == 10
+ && !ARM_CPU_HAS_FEATURE (flags, arm_ext_v7a)
+ && ARM_CPU_HAS_FEATURE (flags, arm_ext_v7m)
+ && ARM_CPU_HAS_FEATURE (flags, arm_ext_v6_dsp))
+ arch = 13;
+
/* Tag_CPU_name. */
if (selected_cpu_name[0])
{
Index: include/elf/arm.h
===================================================================
--- include/elf/arm.h (revision 268577)
+++ include/elf/arm.h (working copy)
@@ -100,7 +100,8 @@
#define TAG_CPU_ARCH_V7 10
#define TAG_CPU_ARCH_V6_M 11
#define TAG_CPU_ARCH_V6S_M 12
-#define MAX_TAG_CPU_ARCH 12
+#define TAG_CPU_ARCH_V7E_M 13
+#define MAX_TAG_CPU_ARCH 13
/* Pseudo-architecture to allow objects to be compatible with the subset of
armv4t and armv6-m. This value should never be stored in object files. */
#define TAG_CPU_ARCH_V4T_PLUS_V6_M (MAX_TAG_CPU_ARCH + 1)
Index: include/opcode/arm.h
===================================================================
--- include/opcode/arm.h (revision 268577)
+++ include/opcode/arm.h (working copy)
@@ -47,6 +47,8 @@
#define ARM_EXT_V6M 0x00800000 /* ARM V6M. */
#define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */
#define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */
+#define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
+ not in v7-M. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
@@ -96,7 +98,8 @@
#define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
#define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
- | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR)
+ | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
+ | ARM_EXT_V6_DSP )
#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
@@ -104,7 +107,8 @@
#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
#define ARM_AEXT_NOTM \
- (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
+ (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
+ | ARM_EXT_V6_DSP )
#define ARM_AEXT_V6M \
((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
& ~(ARM_AEXT_NOTM))
@@ -112,6 +116,8 @@
((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
& ~(ARM_AEXT_NOTM))
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
+#define ARM_AEXT_V7EM \
+ (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
/* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
@@ -193,6 +199,7 @@
#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
+#define ARM_ARCH_V7EM ARM_FEATURE (ARM_AEXT_V7EM, 0)
/* Some useful combinations: */
#define ARM_ARCH_NONE ARM_FEATURE (0, 0)
Index: binutils/readelf.c
===================================================================
--- binutils/readelf.c (revision 268577)
+++ binutils/readelf.c (working copy)
@@ -8962,7 +8962,7 @@ typedef struct
static const char * arm_attr_tag_CPU_arch[] =
{"Pre-v4", "v4", "v4T", "v5T", "v5TE", "v5TEJ", "v6", "v6KZ", "v6T2",
- "v6K", "v7", "v6-M", "v6S-M"};
+ "v6K", "v7", "v6-M", "v6S-M", "v7E-M"};
static const char * arm_attr_tag_ARM_ISA_use[] = {"No", "Yes"};
static const char * arm_attr_tag_THUMB_ISA_use[] =
{"No", "Thumb-1", "Thumb-2"};
Index: bfd/elf32-arm.c
===================================================================
--- bfd/elf32-arm.c (revision 268577)
+++ bfd/elf32-arm.c (working copy)
@@ -2971,7 +2971,7 @@ using_thumb_only (struct elf32_arm_link_
Tag_CPU_arch);
int profile;
- if (arch != TAG_CPU_ARCH_V7)
+ if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
return FALSE;
profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
@@ -2999,7 +2999,8 @@ arch_has_arm_nop (struct elf32_arm_link_
Tag_CPU_arch);
return arch == TAG_CPU_ARCH_V6T2
|| arch == TAG_CPU_ARCH_V6K
- || arch == TAG_CPU_ARCH_V7;
+ || arch == TAG_CPU_ARCH_V7
+ || arch == TAG_CPU_ARCH_V7E_M;
}
static bfd_boolean
@@ -3007,7 +3008,8 @@ arch_has_thumb2_nop (struct elf32_arm_li
{
const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
Tag_CPU_arch);
- return arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7;
+ return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
+ || arch == TAG_CPU_ARCH_V7E_M);
}
static bfd_boolean
@@ -9637,6 +9639,23 @@ tag_cpu_arch_combine (bfd *ibfd, int old
T(V6S_M), /* V6_M. */
T(V6S_M) /* V6S_M. */
};
+ const int v7e_m[] =
+ {
+ -1, /* PRE_V4. */
+ -1, /* V4. */
+ T(V7E_M), /* V4T. */
+ T(V7E_M), /* V5T. */
+ T(V7E_M), /* V5TE. */
+ T(V7E_M), /* V5TEJ. */
+ T(V7E_M), /* V6. */
+ T(V7E_M), /* V6KZ. */
+ T(V7E_M), /* V6T2. */
+ T(V7E_M), /* V6K. */
+ T(V7E_M), /* V7. */
+ T(V7E_M), /* V6_M. */
+ T(V7E_M), /* V6S_M. */
+ T(V7E_M) /* V7E_M. */
+ };
const int v4t_plus_v6_m[] =
{
-1, /* PRE_V4. */
@@ -9652,6 +9671,7 @@ tag_cpu_arch_combine (bfd *ibfd, int old
T(V7), /* V7. */
T(V6_M), /* V6_M. */
T(V6S_M), /* V6S_M. */
+ T(V7E_M), /* V7E_M. */
T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
};
const int *comb[] =
@@ -9661,13 +9681,14 @@ tag_cpu_arch_combine (bfd *ibfd, int old
v7,
v6_m,
v6s_m,
+ v7e_m,
/* Pseudo-architecture. */
v4t_plus_v6_m
};
/* Check we've not got a higher architecture than we know about. */
- if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
+ if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
{
_bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
return -1;