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[PATCH] GAS validation improvement for 32b Thumb-1 insn

With the attached patch, 32-bit Thumb instructions are now correctly rejected when assembling for cores that do not support these instructions.

I tested this with the GAS test suite, including the test cases I added.

If accepted, please commit it for me since I don't have write access.

Thanks,
	Daniel.

---

2009-07-10 Daniel Gutson <dgutson@codesourcery.com>

	gas/
	* config/tc-arm.c (md_assemble): Added validation.

	gas/testsuite
	* gas/arm/thumb-w-bad.d: New test case.
	* gas/arm/thumb-w-bad.l: New file.
	* gas/arm/thumb-w-bad.s: New file.
	* gas/arm/thumb-w-good.d: New test case.
	* gas/arm/thumb-w-good.s: New file.

--
Daniel Gutson
CodeSourcery
www.codesourcery.com

? thumb-wide.patch
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.393
diff -u -p -r1.393 tc-arm.c
--- gas/config/tc-arm.c	9 Jul 2009 07:52:34 -0000	1.393
+++ gas/config/tc-arm.c	10 Jul 2009 23:30:31 -0000
@@ -15372,14 +15372,25 @@ md_assemble (char *str)
 	  return;
 	}
 
-      if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2) && !inst.size_req)
+      if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2))
 	{
-	  /* Implicit require narrow instructions on Thumb-1.  This avoids
-	     relaxation accidentally introducing Thumb-2 instructions.  */
 	  if (opcode->tencode != do_t_blx && opcode->tencode != do_t_branch23
-	      && !(ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_msr)
-		   || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_barrier)))
-	    inst.size_req = 2;
+	      && !(ARM_CPU_HAS_FEATURE(*opcode->tvariant, arm_ext_msr)
+		   || ARM_CPU_HAS_FEATURE(*opcode->tvariant, arm_ext_barrier)))
+	    {
+	      /* Two things are addressed here.
+		 1) Implicit require narrow instructions on Thumb-1.
+		    This avoids relaxation accidentally introducing Thumb-2
+		     instructions.
+		 2) Reject wide instructions in non Thumb-2 cores.  */
+	      if (inst.size_req == 0)
+		inst.size_req = 2;
+	      else if (inst.size_req == 4)
+		{
+		  as_bad (_("selected processor does not support `%s'"), str);
+		  return;
+		}
+	    }
 	}
 
       mapping_state (MAP_THUMB);
Index: gas/testsuite/gas/arm/thumb-w-bad.d
===================================================================
RCS file: gas/testsuite/gas/arm/thumb-w-bad.d
diff -N gas/testsuite/gas/arm/thumb-w-bad.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/thumb-w-bad.d	10 Jul 2009 23:30:32 -0000
@@ -0,0 +1,3 @@
+#name: Wide instruction rejected in non-Thumb2 cores.
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#error-output: thumb-w-bad.l
Index: gas/testsuite/gas/arm/thumb-w-bad.l
===================================================================
RCS file: gas/testsuite/gas/arm/thumb-w-bad.l
diff -N gas/testsuite/gas/arm/thumb-w-bad.l
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/thumb-w-bad.l	10 Jul 2009 23:30:32 -0000
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:4: Error: selected processor does not support `mov.w r1,r2'
+[^:]*:5: Error: selected processor does not support `mrs.w r0,apsr'
Index: gas/testsuite/gas/arm/thumb-w-bad.s
===================================================================
RCS file: gas/testsuite/gas/arm/thumb-w-bad.s
diff -N gas/testsuite/gas/arm/thumb-w-bad.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/thumb-w-bad.s	10 Jul 2009 23:30:32 -0000
@@ -0,0 +1,6 @@
+.syntax unified
+.arch armv4t
+.thumb
+mov.w r1, r2
+mrs.w r0, apsr
+
Index: gas/testsuite/gas/arm/thumb-w-good.d
===================================================================
RCS file: gas/testsuite/gas/arm/thumb-w-good.d
diff -N gas/testsuite/gas/arm/thumb-w-good.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/thumb-w-good.d	10 Jul 2009 23:30:32 -0000
@@ -0,0 +1,9 @@
+#name: Wide instruction acceptance in Thumb-2 cores
+#objdump: -d --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+00000000 <.text> f7ff fffe 	bl	00000000 <foo>
+00000004 <foo\+0x4> f3ef 8000 	mrs	r0, CPSR
Index: gas/testsuite/gas/arm/thumb-w-good.s
===================================================================
RCS file: gas/testsuite/gas/arm/thumb-w-good.s
diff -N gas/testsuite/gas/arm/thumb-w-good.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/thumb-w-good.s	10 Jul 2009 23:30:32 -0000
@@ -0,0 +1,7 @@
+.thumb
+.syntax unified
+.arch armv4t
+bl.w foo
+.arch armv6-m
+mrs.w r0, apsr
+
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