symbol sizes in assembly

[Martin Walter <martin dot walter at gmail dot com>]

Hello,
I am currently porting the binutils to a new architecture where the
target machine expects symbol values to match the instruction count
instead of the real address. For that architecture each instruction is
of 16-bit length.

I have tried to set the 'bits_per_size' field of the
'bfd_arch_info_type' struct in bfd/cpu-xxx.c to 16 instead of 8, which
divided section sizes by a factor 2, but left symbol sizes untouched
as they were still counted in bytes.

Does someone know of a solution on how to get the assembler to compute
symbol addresses according to the instruction length?

Thank you!
Martin