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Hello, AMD announced the new instruction sets XOP, FMA4 and CVT16 instructions replacing the previously announced SSE5 instructions that will be part of future processors. The programmers guide for these instructions is located at http://support.amd.com/us/Processor_TechDocs/43479.pdf. As a first step, the attached patch (I have gzipped the patch as it was too big to fit in email) removes the current SSE5 support in binutils. Tested for x86_64. Passed make check. Is this Ok? I'll be sending the patches adding the new instructions subsequently in the next week. Thanks, Dwarak
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patch1.txt.gz
Description: patch1.txt.gz
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ChangeLog
Description: ChangeLog
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