Index: gas/config/tc-ppc.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-ppc.c,v retrieving revision 1.114 diff -u -p -r1.114 tc-ppc.c --- gas/config/tc-ppc.c 22 Sep 2006 13:54:06 -0000 1.114 +++ gas/config/tc-ppc.c 21 Oct 2006 00:29:21 -0000 @@ -920,6 +920,12 @@ parse_cpu (const char *arg) | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6); } + else if (strcmp (arg, "cell") == 0) + { + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_64 | PPC_OPCODE_POWER4 + | PPC_OPCODE_CELL); + } /* -mcom means assemble for the common intersection between Power and PowerPC. At present, we just allow the union, rather than the intersection. */ @@ -1116,6 +1122,7 @@ PowerPC options:\n\ -mpower4 generate code for Power4 architecture\n\ -mpower5 generate code for Power5 architecture\n\ -mpower6 generate code for Power6 architecture\n\ +-mcell generate code for Cell Broadband Engine architecture\n\ -mcom generate code Power/PowerPC common instructions\n\ -many generate code for any architecture (PWR/PWRX/PPC)\n")); fprintf (stream, _("\ Index: gas/doc/c-ppc.texi =================================================================== RCS file: /cvs/src/src/gas/doc/c-ppc.texi,v retrieving revision 1.9 diff -u -p -r1.9 c-ppc.texi --- gas/doc/c-ppc.texi 24 Jul 2006 13:49:49 -0000 1.9 +++ gas/doc/c-ppc.texi 21 Oct 2006 00:29:21 -0000 @@ -82,6 +82,9 @@ Generate code for Power5 architecture. @item -mpower6 Generate code for Power6 architecture. +@item -mcell +Generate code for Cell Broadband Engine architecture. + @item -mcom Generate code Power/PowerPC common instructions. Index: include/opcode/ppc.h =================================================================== RCS file: /cvs/src/src/include/opcode/ppc.h,v retrieving revision 1.22 diff -u -p -r1.22 ppc.h --- include/opcode/ppc.h 7 Jun 2006 05:23:59 -0000 1.22 +++ include/opcode/ppc.h 21 Oct 2006 00:29:21 -0000 @@ -143,6 +143,8 @@ extern const int powerpc_num_opcodes; /* Opcode is only supported by Power6 architecture. */ #define PPC_OPCODE_POWER6 0x4000000 +/* Opcode is only supported by PowerPC Cell family. */ +#define PPC_OPCODE_CELL 0x6000000 /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) Index: opcodes/ppc-dis.c =================================================================== RCS file: /cvs/src/src/opcodes/ppc-dis.c,v retrieving revision 1.23 diff -u -p -r1.23 ppc-dis.c --- opcodes/ppc-dis.c 7 Jun 2006 05:23:59 -0000 1.23 +++ opcodes/ppc-dis.c 21 Oct 2006 00:29:21 -0000 @@ -74,6 +74,10 @@ powerpc_dialect (struct disassemble_info dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5; if (info->disassembler_options + && strstr (info->disassembler_options, "cell") != NULL) + dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC; + + if (info->disassembler_options && strstr (info->disassembler_options, "power6") != NULL) dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC; Index: opcodes/ppc-opc.c =================================================================== RCS file: /cvs/src/src/opcodes/ppc-opc.c,v retrieving revision 1.85 diff -u -p -r1.85 ppc-opc.c --- opcodes/ppc-opc.c 15 Nov 2005 21:33:04 -0000 1.85 +++ opcodes/ppc-opc.c 21 Oct 2006 00:29:21 -0000 @@ -1823,6 +1823,7 @@ extract_tbr (unsigned long insn, #define NOPOWER4 PPC_OPCODE_NOPOWER4 | PPCCOM #define POWER4 PPC_OPCODE_POWER4 #define POWER5 PPC_OPCODE_POWER5 +#define CELL PPC_OPCODE_CELL #define PPC32 PPC_OPCODE_32 | PPC_OPCODE_PPC #define PPC64 PPC_OPCODE_64 | PPC_OPCODE_PPC #define PPC403 PPC_OPCODE_403 @@ -3014,7 +3015,7 @@ const struct powerpc_opcode powerpc_opco { "crand", XL(19,257), XL_MASK, COM, { BT, BA, BB } }, -{ "hrfid", XL(19,274), 0xffffffff, POWER5, { 0 } }, +{ "hrfid", XL(19,274), 0xffffffff, POWER5 | CELL, { 0 } }, { "crset", XL(19,289), XL_MASK, PPCCOM, { BT, BAT, BBA } }, { "creqv", XL(19,289), XL_MASK, COM, { BT, BA, BB } }, @@ -3443,7 +3444,7 @@ const struct powerpc_opcode powerpc_opco { "lbzux", X(31,119), X_MASK, COM, { RT, RAL, RB } }, -{ "popcntb", X(31,122), XRB_MASK, POWER5, { RA, RS } }, +{ "popcntb", X(31,122), XRB_MASK, POWER5 | CELL, { RA, RS } }, { "not", XRC(31,124,0), X_MASK, COM, { RA, RS, RBS } }, { "nor", XRC(31,124,0), X_MASK, COM, { RA, RS, RB } },