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housekeeping for Xtensa GAS files


I discovered a bunch of extra whitespace in some Xtensa files. I committed this patch to clean up.

2005-05-06 Bob Wilson <bob.wilson@acm.org>

	* config/tc-xtensa.c: Remove excess whitespace.
	* config/tc-xtensa.h: Likewise.
	* config/xtensa-istack.h: Likewise.
	* config/xtensa-relax.c: Likewise.
	* config/xtensa-relax.h: Likewise.

Index: config/tc-xtensa.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-xtensa.c,v
retrieving revision 1.39
diff -u -r1.39 tc-xtensa.c
--- config/tc-xtensa.c	5 May 2005 09:13:04 -0000	1.39
+++ config/tc-xtensa.c	6 May 2005 21:21:57 -0000
@@ -81,7 +81,7 @@
 static enum debug_info_type xt_saved_debug_type = DEBUG_NONE;
 
 /* Some functions are only valid in the front end.  This variable
-   allows us to assert that we haven't crossed over into the 
+   allows us to assert that we haven't crossed over into the
    back end.  */
 static bfd_boolean past_xtensa_end = FALSE;
 
@@ -322,13 +322,13 @@
   int num_formats;
   /* A number describing how restrictive the issue is for this
      opcode.  For example, an opcode that fits lots of different
-     formats has a high freedom, as does an opcode that fits 
+     formats has a high freedom, as does an opcode that fits
      only one format but many slots in that format.  The most
-     restrictive is the opcode that fits only one slot in one 
+     restrictive is the opcode that fits only one slot in one
      format.  */
   int issuef;
   /* The single format (i.e., if the op can live in a bundle by itself),
-     narrowest format, and widest format the op can be bundled in 
+     narrowest format, and widest format the op can be bundled in
      and their sizes:  */
   xtensa_format single;
   xtensa_format narrowest;
@@ -844,7 +844,7 @@
       /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
          should be emitted or not.  FIXME: Not implemented.  */
       return 1;
-      
+
     case option_prefer_l32r:
       if (prefer_const16)
 	as_fatal (_("prefer-l32r conflicts with prefer-const16"));
@@ -857,7 +857,7 @@
       prefer_const16 = 1;
       return 1;
 
-    case option_target_hardware: 
+    case option_target_hardware:
       {
 	int earliest, latest = 0;
 	if (*arg == 0 || *arg == '-')
@@ -950,8 +950,8 @@
 }
 
 
-/* The "loops_ok" argument is provided to allow ignoring labels that 
-   define loop ends.  This fixes a bug where the NOPs to align a 
+/* The "loops_ok" argument is provided to allow ignoring labels that
+   define loop ends.  This fixes a bug where the NOPs to align a
    loop opcode were included in a previous zero-cost loop:
 
    loop a0, loopend
@@ -1144,7 +1144,7 @@
   /* This code is a hack to make .begin [no-][generics|relax] exactly
      equivalent to .begin [no-]transform.  We should remove it when
      we stop accepting those options.  */
-     
+
   if (strncmp (input_line_pointer, "generics", strlen ("generics")) == 0)
     {
       as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
@@ -1154,7 +1154,7 @@
     {
       as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
       directive_string = "transform";
-    }    
+    }
   else
     directive_string = input_line_pointer;
 
@@ -1212,7 +1212,7 @@
       break;
 
     case directive_literal_prefix:
-      /* Have to flush pending output because a movi relaxed to an l32r 
+      /* Have to flush pending output because a movi relaxed to an l32r
 	 might produce a literal.  */
       md_flush_pending_output ();
       /* Check to see if the current fragment is a literal
@@ -1927,9 +1927,9 @@
 
 	  input_line_pointer = arg_end;
 	  num_args += 1;
-	  saw_comma = FALSE; 
+	  saw_comma = FALSE;
 	  saw_colon = FALSE;
-	  saw_arg = TRUE; 
+	  saw_arg = TRUE;
 	  break;
 	}
     }
@@ -1946,7 +1946,7 @@
   else if (saw_colon)
     as_bad (_("extra colon"));
   else if (!saw_arg)
-    as_bad (_("missing argument"));  
+    as_bad (_("missing argument"));
   else
     as_bad (_("missing comma or colon"));
   input_line_pointer = old_input_line_pointer;
@@ -2046,7 +2046,7 @@
     goto err;
 
   insn->ntok = tok - insn->tok;
-  had_error = FALSE; 
+  had_error = FALSE;
 
  err:
   input_line_pointer = old_input_line_pointer;
@@ -2992,7 +2992,7 @@
    NARROW_ONLY is true, then only consider relaxations that widen a narrow
    instruction, i.e., ignore relaxations that convert to an instruction of
    equal size.  In some contexts where this function is used, only
-   a single widening is allowed and the NARROW_ONLY argument is used to 
+   a single widening is allowed and the NARROW_ONLY argument is used to
    exclude cases like ADDI being "widened" to an ADDMI, which may
    later be relaxed to an ADDMI/ADDI pair.  */
 
@@ -3318,7 +3318,7 @@
 	    {
 	      target += stretch;
 	    }
- 
+
 	  new_offset = target;
 	  xtensa_operand_do_reloc (isa, insn->opcode, i, &new_offset, pc);
 	  if (xg_check_operand (new_offset, insn->opcode, i))
@@ -3743,7 +3743,7 @@
   if (target_frag == NULL)
     return FALSE;
 
-  if (is_next_frag_target (fragP->fr_next, target_frag) 
+  if (is_next_frag_target (fragP->fr_next, target_frag)
       && S_GET_VALUE (sym) == target_frag->fr_address)
     return TRUE;
 
@@ -4046,7 +4046,7 @@
       if (size > litsize)
 	{
 	  /* This happens when someone writes a "movi a2, big_number".  */
-	  as_bad_where (frag_now->fr_file, frag_now->fr_line, 
+	  as_bad_where (frag_now->fr_file, frag_now->fr_line,
 			_("invalid immediate"));
 	  xtensa_restore_emit_state (&state);
 	  return NULL;
@@ -4203,7 +4203,7 @@
   the_fix->tc_fix_data.X_add_symbol = expr->X_add_symbol;
   the_fix->tc_fix_data.X_add_number = expr->X_add_number;
   the_fix->tc_fix_data.slot = slot;
-  
+
   return TRUE;
 }
 
@@ -4324,7 +4324,7 @@
       || opcode == xtensa_waiti_opcode
       || opcode == xtensa_rsr_lcount_opcode)
     return TRUE;
-  
+
   return FALSE;
 }
 
@@ -4366,7 +4366,7 @@
 {
   fragS *next_fragP = fragP->fr_next;
 
-  /* Sometimes an empty will end up here due storage allocation issues. 
+  /* Sometimes an empty will end up here due storage allocation issues.
      So we have to skip until we find something legit.  */
   while (next_fragP && next_fragP->fr_fix == 0)
     next_fragP = next_fragP->fr_next;
@@ -4403,7 +4403,7 @@
   static xtensa_insnbuf insnbuf = NULL;
   xtensa_isa isa = xtensa_default_isa;
   xtensa_format fmt;
-  int fmt_size; 
+  int fmt_size;
 
   if (!insnbuf)
     insnbuf = xtensa_insnbuf_alloc (isa);
@@ -4424,7 +4424,7 @@
   if (fragP->fr_opcode != fragP->fr_literal)
     return fmt_size;
 
-  /* If during relaxation we have to pull an instruction out of a 
+  /* If during relaxation we have to pull an instruction out of a
      multi-slot instruction, we will return the more conservative
      number.  This works because alignment on bigger instructions
      is more restrictive than alignment on smaller instructions.
@@ -4445,7 +4445,7 @@
   if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP1
       || fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP2)
     return 3;
-  
+
   if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
     return 2 + fragP->tc_frag_data.text_expansion[0];
 
@@ -4527,7 +4527,7 @@
 static bfd_boolean
 next_frag_is_loop_target (const fragS *fragP)
 {
-  /* Sometimes an empty will end up here due storage allocation issues. 
+  /* Sometimes an empty will end up here due storage allocation issues.
      So we have to skip until we find something legit. */
   for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
     {
@@ -4715,7 +4715,7 @@
     fragP->tc_frag_data.is_no_density = TRUE;
 
   /* This function is called from subsegs_finish, which is called
-     after xtensa_end, so we can't use "use_transform" or 
+     after xtensa_end, so we can't use "use_transform" or
      "use_schedule" here.  */
   if (!directive_state[directive_transform])
     fragP->tc_frag_data.is_no_transform = TRUE;
@@ -4801,9 +4801,9 @@
   flagword flags = bfd_get_section_flags (abfd, sec);
   segment_info_type *seginfo = seg_info (sec);
   fragS *frag = seginfo->frchainP->frch_root;
-  
+
   if (flags & SEC_CODE)
-    {  
+    {
       xtensa_isa isa = xtensa_default_isa;
       xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
       while (frag != NULL)
@@ -4841,9 +4841,9 @@
   segment_info_type *seginfo = seg_info (sec);
   fragS *frag = seginfo->frchainP->frch_root;
   xtensa_isa isa = xtensa_default_isa;
-  
+
   if (flags & SEC_CODE)
-    {  
+    {
       xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
       while (frag != NULL)
 	{
@@ -5261,7 +5261,7 @@
     }
 
   dwarf2_where (&orig_insn.loc);
-  
+
   xg_add_branch_and_loop_targets (&orig_insn);
 
   /* Special-case for "entry" instruction.  */
@@ -5333,7 +5333,7 @@
       int count;
       count = fragP->fr_next->fr_address - fragP->fr_address - fragP->fr_fix;
       if (count != 0)
-	as_bad_where (fragP->fr_file, fragP->fr_line, 
+	as_bad_where (fragP->fr_file, fragP->fr_line,
 		      _("unaligned entry instruction"));
     }
 }
@@ -5760,11 +5760,11 @@
 
 /* Checks for resource conflicts between instructions.  */
 
-/* The func unit stuff could be implemented as bit-vectors rather 
-   than the iterative approach here.  If it ends up being too 
+/* The func unit stuff could be implemented as bit-vectors rather
+   than the iterative approach here.  If it ends up being too
    slow, we will switch it.  */
 
-resource_table * 
+resource_table *
 new_resource_table (void *data,
 		    int cycles,
 		    int nu,
@@ -5792,7 +5792,7 @@
 }
 
 
-void 
+void
 clear_resource_table (resource_table *rt)
 {
   int i, j;
@@ -5804,7 +5804,7 @@
 
 /* We never shrink it, just fake it into thinking so.  */
 
-void 
+void
 resize_resource_table (resource_table *rt, int cycles)
 {
   int i, old_cycles;
@@ -5824,13 +5824,13 @@
 }
 
 
-bfd_boolean 
+bfd_boolean
 resources_available (resource_table *rt, xtensa_opcode opcode, int cycle)
 {
   int i;
   int uses = (rt->opcode_num_units) (rt->data, opcode);
 
-  for (i = 0; i < uses; i++) 
+  for (i = 0; i < uses; i++)
     {
       xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
       int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
@@ -5841,20 +5841,20 @@
     }
   return TRUE;
 }
-     
 
-void 
+
+void
 reserve_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
 {
   int i;
   int uses = (rt->opcode_num_units) (rt->data, opcode);
 
-  for (i = 0; i < uses; i++) 
+  for (i = 0; i < uses; i++)
     {
       xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
       int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
-      /* Note that this allows resources to be oversubscribed.  That's 
-	 essential to the way the optional scheduler works. 
+      /* Note that this allows resources to be oversubscribed.  That's
+	 essential to the way the optional scheduler works.
 	 resources_available reports when a resource is over-subscribed,
 	 so it's easy to tell.  */
       rt->units[stage + cycle][unit]++;
@@ -5862,13 +5862,13 @@
 }
 
 
-void 
+void
 release_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
 {
   int i;
   int uses = (rt->opcode_num_units) (rt->data, opcode);
 
-  for (i = 0; i < uses; i++) 
+  for (i = 0; i < uses; i++)
     {
       xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
       int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
@@ -5876,20 +5876,20 @@
       assert (rt->units[stage + cycle][unit] >= 0);
     }
 }
-     
+
 
 /* Wrapper functions make parameterized resource reservation
    more convenient.  */
 
-int 
+int
 opcode_funcUnit_use_unit (void *data, xtensa_opcode opcode, int idx)
 {
   xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
-  return use->unit;  
+  return use->unit;
 }
 
 
-int 
+int
 opcode_funcUnit_use_stage (void *data, xtensa_opcode opcode, int idx)
 {
   xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
@@ -5899,7 +5899,7 @@
 
 /* Note that this function does not check issue constraints, but
    solely whether the hardware is available to execute the given
-   instructions together.  It also doesn't check if the tinsns 
+   instructions together.  It also doesn't check if the tinsns
    write the same state, or access the same tieports.  That is
    checked by check_t1_t2_reads_and_writes.  */
 
@@ -5913,7 +5913,7 @@
   if (vinsn->num_slots == 1)
     return FALSE;
 
-  if (rt == NULL) 
+  if (rt == NULL)
     {
       xtensa_isa isa = xtensa_default_isa;
       rt = new_resource_table
@@ -5992,7 +5992,7 @@
       return;
     }
 
-  if (resources_conflict (vinsn)) 
+  if (resources_conflict (vinsn))
     {
       as_where (&file_name, &line);
       as_bad_where (file_name, line, _("illegal resource usage in bundle"));
@@ -6074,7 +6074,7 @@
 		  if (vinsn->format == XTENSA_UNDEFINED)
 		    vinsn->slots[i].opcode = xtensa_nop_opcode;
 		  else
-		    vinsn->slots[i].opcode 
+		    vinsn->slots[i].opcode
 		      = xtensa_format_slot_nop_opcode (xtensa_default_isa,
 						       vinsn->format, i);
 
@@ -6090,7 +6090,7 @@
     }
 
   /* Now check resource conflicts on the modified bundle.  */
-  if (resources_conflict (vinsn)) 
+  if (resources_conflict (vinsn))
     {
       as_where (&file_name, &line);
       as_bad_where (file_name, line, _("illegal resource usage in bundle"));
@@ -6225,7 +6225,7 @@
    case A: t1 reads a register t2 writes (an antidependency within a bundle)
    case B: no relationship between what is read and written (both could
            read the same reg though)
-   case C: t1 writes a register t2 writes (a register conflict within a 
+   case C: t1 writes a register t2 writes (a register conflict within a
            bundle)
    case D: t1 writes a state that t2 also writes
    case E: t1 writes a tie queue that t2 also writes
@@ -6325,7 +6325,7 @@
 	{
 	  xtensa_state t1_so = xtensa_stateOperand_state (isa, t1->opcode, i);
 	  t1_inout = xtensa_stateOperand_inout (isa, t1->opcode, i);
-	  if (t1_so != t2_so) 
+	  if (t1_so != t2_so)
 	    continue;
 
 	  if (t2_inout == 'i' && (t1_inout == 'm' || t1_inout == 'o'))
@@ -6333,22 +6333,22 @@
 	      conflict = 'a';
 	      continue;
 	    }
-	  
+
 	  if (t1_inout == 'i' && (t2_inout == 'm' || t2_inout == 'o'))
 	    {
 	      conflict = 'a';
 	      continue;
 	    }
-	  
+
 	  if (t1_inout != 'i' && t2_inout != 'i')
 	    return 'd';
-	}      
+	}
     }
 
   /* Check tieports.  */
   t1_interfaces = xtensa_opcode_num_interfaceOperands (isa, t1->opcode);
   t2_interfaces = xtensa_opcode_num_interfaceOperands (isa, t2->opcode);
-  for (j = 0; j < t2_interfaces; j++) 
+  for (j = 0; j < t2_interfaces; j++)
     {
       xtensa_interface t2_int
 	= xtensa_interfaceOperand_interface (isa, t2->opcode, j);
@@ -6370,27 +6370,27 @@
 
 	  if (t1_volatile && t2_volatile && (t1_class == t2_class))
 	    return 'f';
-	  
+
 	  if (t1_int != t2_int)
 	    continue;
-	  
+
 	  if (t2_inout == 'i' && t1_inout == 'o')
 	    {
 	      conflict = 'a';
 	      continue;
 	    }
-	  
+
 	  if (t1_inout == 'i' && t2_inout == 'o')
 	    {
 	      conflict = 'a';
 	      continue;
 	    }
-	  
+
 	  if (t1_inout != 'i' && t2_inout != 'i')
 	    return 'e';
 	}
     }
-  
+
   return conflict;
 }
 
@@ -6504,7 +6504,7 @@
 	      extra_space += 3; /* for the nop size */
 	      tinsn->subtype = RELAX_ADD_NOP_IF_PRE_LOOP_END;
 	    }
-	  
+
 	  /* Need to assemble it with space for the relocation.  */
 	  if (xg_is_relaxable_insn (tinsn, 0)
 	      && !tinsn->is_specific_opcode)
@@ -6512,9 +6512,9 @@
 	      int max_size = xg_get_max_insn_widen_size (tinsn->opcode);
 	      int max_literal_size =
 		xg_get_max_insn_widen_literal_size (tinsn->opcode);
-	      
+
 	      tinsn->literal_space = max_literal_size;
-	      
+
 	      tinsn->subtype = RELAX_IMMED;
 	      tinsn->record_fix = FALSE;
 	      extra_space += max_size;
@@ -6579,10 +6579,10 @@
   istack_init (&istack);
 
   /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
-     Because the scheduling and bundling characteristics of movi and 
-     l32r or const16 are so different, we can do much better if we relax 
+     Because the scheduling and bundling characteristics of movi and
+     l32r or const16 are so different, we can do much better if we relax
      it prior to scheduling and bundling, rather than after.  */
-  if ((orig_insn->opcode == xtensa_movi_opcode 
+  if ((orig_insn->opcode == xtensa_movi_opcode
        || orig_insn->opcode == xtensa_movi_n_opcode)
       && !cur_vinsn.inside_bundle
       && (orig_insn->tok[1].X_op == O_symbol
@@ -6595,7 +6595,7 @@
   for (i = 0; i < istack.ninsn; i++)
     {
       TInsn *insn = &istack.insn[i];
-      switch (insn->insn_type) 
+      switch (insn->insn_type)
 	{
 	case ITYPE_LITERAL:
 	  assert (lit_sym == NULL);
@@ -6718,9 +6718,9 @@
       /* See if the instruction implies an aligned section.  */
       if (xtensa_opcode_is_loop (isa, vinsn->slots[i].opcode) == 1)
 	record_alignment (now_seg, 2);
-      
+
       /* Also determine the best line number for debug info.  */
-      best_loc = vinsn->slots[i].loc.line < best_loc.line 
+      best_loc = vinsn->slots[i].loc.line < best_loc.line
 	? vinsn->slots[i].loc : best_loc;
     }
 
@@ -6729,10 +6729,10 @@
   if (xtensa_opcode_is_loop (isa, vinsn->slots[0].opcode) == 1)
     {
       int max_fill;
-      
+
       xtensa_set_frag_assembly_state (frag_now);
       frag_now->tc_frag_data.is_insn = TRUE;
-      
+
       max_fill = get_text_align_max_fill_size
 	(get_text_align_power (xtensa_fetch_width),
 	 TRUE, frag_now->tc_frag_data.is_no_density);
@@ -6744,10 +6744,10 @@
 		  frag_now->fr_offset,
 		  NULL);
       else
-	frag_var (rs_machine_dependent, 0, 0, 
+	frag_var (rs_machine_dependent, 0, 0,
 		  RELAX_CHECK_ALIGN_NEXT_OPCODE, 0, 0, NULL);
       xtensa_set_frag_assembly_state (frag_now);
-      
+
       xtensa_move_labels (frag_now, 0, FALSE);
     }
 
@@ -6788,7 +6788,7 @@
     return;
 
   xtensa_insnbuf_to_chars (isa, vinsn->insnbuf, (unsigned char *) f, 0);
-  
+
   xtensa_dwarf2_emit_insn (insn_size - extra_space, &best_loc);
 
   for (slot = 0; slot < vinsn->num_slots; slot++)
@@ -6809,7 +6809,7 @@
       if (xtensa_opcode_is_branch (isa, tinsn->opcode) == 1)
 	is_branch = TRUE;
 
-      if (tinsn->subtype || tinsn->symbol || tinsn->record_fix 
+      if (tinsn->subtype || tinsn->symbol || tinsn->record_fix
 	  || tinsn->offset || tinsn->literal_frag || is_jump || is_branch)
 	finish_frag = TRUE;
     }
@@ -6986,7 +6986,7 @@
 	      && fragP->fr_subtype == RELAX_SLOTS
 	      && fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
 	    frag_wane (fragP);
-	  if (fragP->fr_type == rs_machine_dependent 
+	  if (fragP->fr_type == rs_machine_dependent
 	      && fragP->fr_subtype == RELAX_UNREACHABLE)
 	    fragP->tc_frag_data.is_unreachable = TRUE;
 	}
@@ -7134,7 +7134,7 @@
 
 	      /* Of course, sometimes (mostly for toy test cases) a
 		 zero-cost loop instruction is the last in a section.  */
-	      if (targ_frag) 
+	      if (targ_frag)
 		{
 		  targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
 		  if (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)
@@ -7389,7 +7389,7 @@
 			     < REQUIRED_LOOP_DIVIDING_BYTES)
 			{
 			  int length = 3;
-			  
+
 			  if (fragP->fr_var < length)
 			    as_fatal (_("fr_var %lu < length %d"),
 				      (long) fragP->fr_var, length);
@@ -7461,7 +7461,7 @@
   switch (fragP->fr_type)
     {
     case 0:
-      /* Empty frags created by the obstack allocation scheme 
+      /* Empty frags created by the obstack allocation scheme
 	 end up with type 0.  */
       break;
     case rs_fill:
@@ -7904,7 +7904,7 @@
 
   alignment = (1 << align_pow);
   assert (target_size > 0 && alignment >= (addressT) target_size);
-  
+
   if (!use_nops)
     {
       fill_limit = alignment;
@@ -8024,16 +8024,16 @@
      the smallest number of bytes that need to be added to
      ensure that the next fragment's FIRST instruction will fit
      in a single word.
-     
+
      E.G.,   2 bytes : 0, 1, 2 mod 4
 	     3 bytes: 0, 1 mod 4
-     
+
      If the FIRST instruction MIGHT be relaxed,
      assume that it will become a 3-byte instruction.
-     
+
      Note again here that LOOP instructions are not bundleable,
      and this relaxation only applies to LOOP opcodes.  */
-  
+
   int fill_size = 0;
   int first_insn_size;
   int loop_insn_size;
@@ -8074,7 +8074,7 @@
   /* If it was 8, then we'll need a larger alignment for the section.  */
   align_power = get_text_align_power (first_insn_size);
   record_alignment (now_seg, align_power);
-  
+
   fill_size = get_text_align_fill_size
     (address + pre_opcode_bytes, align_power, first_insn_size, TRUE,
      fragP->tc_frag_data.is_no_density);
@@ -8289,7 +8289,7 @@
     }
 
   /* Tell gas we need another relaxation pass.  */
-  if (! fragP->tc_frag_data.relax_seen) 
+  if (! fragP->tc_frag_data.relax_seen)
     {
       fragP->tc_frag_data.relax_seen = TRUE;
       *stretched_p = 1;
@@ -8476,7 +8476,7 @@
 	      return 0;
 	    }
 	}
-      else 
+      else
 	{
 	  /* Just punt if we don't know the type.  */
 	  *fragPP = fragP;
@@ -8517,7 +8517,7 @@
       opt_diff = local_opt_diff;
       assert (opt_diff >= 0);
       assert (max_diff >= opt_diff);
-      if (max_diff == 0) 
+      if (max_diff == 0)
 	return 0;
 
       if (fragP)
@@ -8526,7 +8526,7 @@
       while (fragP && opt_diff < max_diff && address)
 	{
 	  /* We only use these to determine if we can exit early
-	     because there will be plenty of ways to align future 
+	     because there will be plenty of ways to align future
 	     align frags.  */
 	  int glob_widens = 0;
 	  int dnn = 0;
@@ -8538,7 +8538,7 @@
 	  if (glob_pad || glob_widens >= (1 << branch_align_power (now_seg)))
 	    break;
 
-	  if (address) 
+	  if (address)
 	    {
 	      offsetT next_m_diff;
 	      offsetT next_o_diff;
@@ -8579,15 +8579,15 @@
 	    }
 	  return 0;
 	}
-      local_stretch_amount 
+      local_stretch_amount
 	= bytes_to_stretch (this_frag, wide_nops, narrow_nops,
 			    num_widens, local_opt_diff);
-      global_stretch_amount 
-	= bytes_to_stretch (this_frag, wide_nops, narrow_nops, 
+      global_stretch_amount
+	= bytes_to_stretch (this_frag, wide_nops, narrow_nops,
 			    num_widens, opt_diff);
-      /* If the condition below is true, then the frag couldn't 
-	 stretch the correct amount for the global case, so we just 
-	 optimize locally.  We'll rely on the subsequent frags to get 
+      /* If the condition below is true, then the frag couldn't
+	 stretch the correct amount for the global case, so we just
+	 optimize locally.  We'll rely on the subsequent frags to get
 	 the correct alignment in the global case.  */
       if (global_stretch_amount < local_stretch_amount)
 	stretch_amount = local_stretch_amount;
@@ -8659,7 +8659,7 @@
   assert (desired_diff >= 0 && desired_diff < 8);
   if (desired_diff == 0)
     return 0;
-  
+
   assert (wide_nops > 0 || num_widens > 0);
 
   /* Always prefer widening to NOP-filling.  */
@@ -8669,7 +8669,7 @@
 	 to align the target without widening this frag in any way.  */
       return 0;
     }
-  
+
   if (bytes_short == 0)
     {
       /* Widen every narrow between here and the align target
@@ -8679,7 +8679,7 @@
       else
 	return 1;
     }
-  
+
   /* From here we will need at least one NOP to get an alignment.
      However, we may not be able to align at all, in which case,
      don't widen.  */
@@ -8693,7 +8693,7 @@
 	  if (!this_frag->tc_frag_data.is_no_density && narrow_nops == 1)
 	    return 2; /* case 2 */
 	  return 0;
-	case 3: 
+	case 3:
 	  if (wide_nops > 1)
 	    return 0;
 	  else
@@ -8707,7 +8707,7 @@
 	case 5:
 	  if (num_widens >= 2 && wide_nops == 1)
 	    return 3; /* case 5a */
-	  /* We will need two nops.  Are there enough nops 
+	  /* We will need two nops.  Are there enough nops
 	     between here and the align target?  */
 	  if (wide_nops < 2 || narrow_nops == 0)
 	    return 0;
@@ -8739,7 +8739,7 @@
     }
   else
     {
-      /* We will need a NOP no matter what, but should we widen 
+      /* We will need a NOP no matter what, but should we widen
 	 this instruction to help?
 
 	 This is a RELAX_FRAG_NARROW frag.  */
@@ -9837,7 +9837,7 @@
     {
       frchain_from = seg_info (segment->seg)->frchainP;
       search_frag = frchain_from->frch_root;
-      while (search_frag) 
+      while (search_frag)
 	{
 	  search_frag->tc_frag_data.is_literal = TRUE;
 	  search_frag = search_frag->fr_next;
@@ -9934,10 +9934,10 @@
 
   static bfd_boolean recursive = FALSE;
   fragS *pool_location = get_literal_pool_location (now_seg);
-  bfd_boolean is_init = 
+  bfd_boolean is_init =
     (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
 
-  bfd_boolean is_fini = 
+  bfd_boolean is_fini =
     (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
 
   if (pool_location == NULL
@@ -11450,7 +11450,7 @@
 vinsn_has_specific_opcodes (vliw_insn *v)
 {
   int i;
-  
+
   for (i = 0; i < v->num_slots; i++)
     {
       if (v->slots[i].is_specific_opcode)
Index: config/tc-xtensa.h
===================================================================
RCS file: /cvs/src/src/gas/config/tc-xtensa.h,v
retrieving revision 1.12
diff -u -r1.12 tc-xtensa.h
--- config/tc-xtensa.h	5 May 2005 09:13:05 -0000	1.12
+++ config/tc-xtensa.h	6 May 2005 21:21:57 -0000
@@ -141,7 +141,7 @@
      does not fit, use the specified expansion.  This is similar to
      "NARROW", except that these may not be expanded in order to align
      code.  */
-  
+
   RELAX_IMMED_STEP1,
   /* The last instruction in this fragment (at->fr_opcode) contains a
      literal.  It has already been expanded at least 1 step.  */
@@ -170,7 +170,7 @@
   RELAX_MAYBE_UNREACHABLE,
   /* This marks the location as possibly unreachable.  These are placed
      after a branch that may be relaxed into a branch and jump. If the
-     branch is relaxed, then this frag will be converted to a 
+     branch is relaxed, then this frag will be converted to a
      RELAX_UNREACHABLE frag.  */
 
   RELAX_NONE
@@ -382,27 +382,27 @@
 /* Returns the number of units the opcode uses.  */
 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
 
-/* Given an opcode and an index into the opcode's funcUnit list, 
+/* Given an opcode and an index into the opcode's funcUnit list,
    returns the unit used for the index.  */
 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
 
-/* Given an opcode and an index into the opcode's funcUnit list, 
+/* Given an opcode and an index into the opcode's funcUnit list,
    returns the cycle during which the unit is used.  */
 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
 
-/* The above typedefs parameterize the resource_table so that the 
+/* The above typedefs parameterize the resource_table so that the
    optional scheduler doesn't need its own resource reservation system.
-   
-   For simple resource checking, which is all that happens normally, 
-   the functions will be as follows (with some wrapping to make the 
-   interface more convenient): 
+
+   For simple resource checking, which is all that happens normally,
+   the functions will be as follows (with some wrapping to make the
+   interface more convenient):
 
    unit_num_copies_func = xtensa_funcUnit_num_copies
    opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
    opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
    opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
 
-   Of course the optional scheduler has its own reservation table 
+   Of course the optional scheduler has its own reservation table
    and functions.  */
 
 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
@@ -421,8 +421,8 @@
   char **units;
 } resource_table;
 
-resource_table *new_resource_table 
-  (void *, int, int, unit_num_copies_func, opcode_num_units_func, 
+resource_table *new_resource_table
+  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
    opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
 void resize_resource_table (resource_table *, int);
 void clear_resource_table (resource_table *);
Index: config/xtensa-istack.h
===================================================================
RCS file: /cvs/src/src/gas/config/xtensa-istack.h,v
retrieving revision 1.4
diff -u -r1.4 xtensa-istack.h
--- config/xtensa-istack.h	5 May 2005 09:13:06 -0000	1.4
+++ config/xtensa-istack.h	6 May 2005 21:21:57 -0000
@@ -43,8 +43,8 @@
   enum itype_enum insn_type;
 
   xtensa_opcode opcode;	/* Literals have an invalid opcode.  */
-  bfd_boolean is_specific_opcode; 
-  bfd_boolean keep_wide; 
+  bfd_boolean is_specific_opcode;
+  bfd_boolean keep_wide;
   int ntok;
   expressionS tok[MAX_INSN_ARGS];
   struct dwarf2_line_info loc;
@@ -77,7 +77,7 @@
 bfd_boolean istack_full (IStack *);
 TInsn *istack_top (IStack *);
 void istack_push (IStack *, TInsn *);
-TInsn *istack_push_space (IStack *); 
+TInsn *istack_push_space (IStack *);
 void istack_pop (IStack *);
 
 /* TInsn utilities.  */
Index: config/xtensa-relax.c
===================================================================
RCS file: /cvs/src/src/gas/config/xtensa-relax.c,v
retrieving revision 1.8
diff -u -r1.8 xtensa-relax.c
--- config/xtensa-relax.c	5 May 2005 09:13:06 -0000	1.8
+++ config/xtensa-relax.c	6 May 2005 21:21:57 -0000
@@ -15,7 +15,7 @@
 
    You should have received a copy of the GNU General Public License
    along with GAS; see the file COPYING.  If not, write to
-   the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 
+   the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
 /* This file contains the code for generating runtime data structures
@@ -25,7 +25,7 @@
    matches.  The preconditions can specify that two operands are the
    same or an operand is a specific constant or register.  The expansion
    uses the bound variables from the pattern to specify that specific
-   operands from the pattern should be used in the result.  
+   operands from the pattern should be used in the result.
 
    The code determines whether the condition applies to a constant or
    a register depending on the type of the operand.  You may get
@@ -46,10 +46,10 @@
    OPTIONPRED   ::= OPTIONNAME ('+' OPTIONNAME)
    OPTIONNAME   ::= '"' id '"'
 
-   The replacement language 
+   The replacement language
    INSN_REPL      ::= INSN_LABEL_LIT ( ';' INSN_LABEL_LIT )*
-   INSN_LABEL_LIT ::= INSN_TEMPL 
-                      | 'LABEL' num 
+   INSN_LABEL_LIT ::= INSN_TEMPL
+                      | 'LABEL' num
                       | 'LITERAL' num ' ' VARIABLE
 
    The operands in a PRECOND must be constants or variables bound by
@@ -75,7 +75,7 @@
    {"beqz %as,%label", "bnez %as,%LABEL0;j %label;LABEL0"}
    would convert a branch to a negated branch to the following instruction
    with a jump to the original label.
-   
+
    An Xtensa-specific example that generates a literal:
    {"movi %at,%imm", "LITERAL0 %imm; l32r %at,%LITERAL0"}
    will convert a movi instruction to an l32r of a literal
@@ -263,9 +263,9 @@
   {"slli %ar,%as,0", "or %ar,%as,%as"},
 
   /* Widening with literals or const16.  */
-  {"movi %at,%imm ? IsaUseL32R ", 
+  {"movi %at,%imm ? IsaUseL32R ",
    "LITERAL0 %imm; l32r %at,%LITERAL0"},
-  {"movi %at,%imm ? IsaUseConst16", 
+  {"movi %at,%imm ? IsaUseConst16",
    "const16 %at,HI16U(%imm); const16 %at,LOW16U(%imm)"},
 
   {"addi %ar,%as,%imm", "addmi %ar,%as,%imm"},
@@ -1278,7 +1278,7 @@
   new_req_option = (ReqOption *) xmalloc (sizeof (ReqOption));
   new_req_option->or_option_terms = NULL;
   new_req_option->next = NULL;
-  new_req_option->or_option_terms = 
+  new_req_option->or_option_terms =
     clone_req_or_option_list (req_option->or_option_terms);
   new_req_option->next = clone_req_option_list (req_option->next);
   return new_req_option;
@@ -1325,7 +1325,7 @@
       req->next = NULL;
 
       /* Append to list.  */
-      for (r_p = &option->or_option_terms; (*r_p) != NULL; 
+      for (r_p = &option->or_option_terms; (*r_p) != NULL;
 	   r_p = &(*r_p)->next)
 	;
       (*r_p) = req;
@@ -1366,7 +1366,7 @@
       clear_split_rec (&optionrec);
       return FALSE;
     }
-  
+
   init_split_rec (&rec);
 
   split_string (&rec, optionrec.vec[0], '|', TRUE);
@@ -1409,7 +1409,7 @@
       ReqOption *req_option = (ReqOption *) xmalloc (sizeof (ReqOption));
       req_option->or_option_terms = NULL;
       req_option->next = NULL;
-      
+
       if (!parse_option_cond (optionrec.vec[i], req_option))
 	{
 	  clear_split_rec (&rec);
@@ -1477,7 +1477,7 @@
 	  || req_or_option->next != NULL)
 	continue;
 
-      if (strncmp (req_or_option->option_name, "IsaUse", 6) == 0) 
+      if (strncmp (req_or_option->option_name, "IsaUse", 6) == 0)
 	{
 	  bfd_boolean option_available = FALSE;
 	  char *option_name = req_or_option->option_name + 6;
@@ -1501,7 +1501,7 @@
 	}
       else if (strcmp (req_or_option->option_name, "realnop") == 0)
 	{
-	  bfd_boolean nop_available = 
+	  bfd_boolean nop_available =
 	    (xtensa_opcode_lookup (xtensa_default_isa, "nop")
 	     != XTENSA_UNDEFINED);
 	  if ((nop_available ^ req_or_option->is_true) != 0)
@@ -1697,7 +1697,7 @@
 	      return NULL;
 	    }
 	  /* Check for the right number of ops.  */
-	  if (xtensa_opcode_num_operands (isa, bi->opcode) 
+	  if (xtensa_opcode_num_operands (isa, bi->opcode)
 	      != (int) operand_count)
 	    as_fatal (_("opcode '%s': replacement does not have %d ops"),
 		      opcode_name,
Index: config/xtensa-relax.h
===================================================================
RCS file: /cvs/src/src/gas/config/xtensa-relax.h,v
retrieving revision 1.4
diff -u -r1.4 xtensa-relax.h
--- config/xtensa-relax.h	5 May 2005 09:13:06 -0000	1.4
+++ config/xtensa-relax.h	6 May 2005 21:21:57 -0000
@@ -15,7 +15,7 @@
 
    You should have received a copy of the GNU General Public License
    along with GAS; see the file COPYING.  If not, write to
-   the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 
+   the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
 #ifndef XTENSA_RELAX_H

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