[PATCH] x86 Intel syntax

["Jan Beulich" <JBeulich at novell dot com>]

This is an update to the earlier posted x86 (dis)assembler Intel syntax
changes, mainly synchronizing with recent changes to the files
modified.

Built and tested on i686-pc-linux-gnu and x86_64-unknown-linux-gnu.

Jan

gas:
2004-07-23 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (set_intel_syntax): Allow % in symbol names
when
	intel syntax and no register prefix, allow $ in symbol names
when
	intel syntax.
	(set_16bit_gcc_code_flag): Replace literal 'l' by
LONG_MNEM_SUFFIX.
	(intel_float_operand): Add fourth return value indicating math
control
	operations. Make classification more precise.
	(md_assemble): Complain if memory operand of mov[sz]x has no
size
	specified.
	(parse_insn): Translate word operands to floating point
instructions
	operating on integers as well as control instructions to short
ones
	as expected by AT&T syntax. Translate 'd' suffix to short one
only for
	floating point instructions operating on non-integer operands.
	(match_template): Remove fldcw special case.
	(process_suffix): Don't guess DefaultSize insns' suffix from
	stackop_size for certain floating point control instructions.
Guess
	suffix for branch and [ls][gi]dt based on flag_code. Split
error
	messages for Intel and AT&T syntax, and make the condition more
strict
	for the former. Adjust suppressing of generation of operand
size
	overrides.
	(intel parser): Allow the full set of MASM operators. Add FWORD,
TBYTE,
	and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
more
	error checking.
	* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR
XWORD_PTR
	SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.

gas/testsuite:
2004-07-23 Jan Beulich <jbeulich@novell.com>
	* gas/i386/i386.exp: Execute new tests intelbad and intelok.
	* gas/i386/intelbad.[sl]: New test to check for various things
not
	permitted in Intel mode.
	* gas/i386/intel.d, gas/i386/opcode.d,
gas/i386/x86-64-opcode.d:
	Adjust for change to segment register store.
	* gas/i386/intelok.[sd]: New test to check various Intel mode
specific
	things get handled correctly.
	* gas/i386/prefix.[sd]: Remove illegal 'fstsw %eax' (which
should
	actually be rejected, but currently isn't due to the way the
	accumulator is beaing dealt with.
	* gas/i386/x86_64.[sd]: Remove unsupported constructs referring
to
	'high' and 'low' parts of an operand, which the parser
previously
	accepted while neither telling that it's not supported nor that
it
	ignored the remainder of the line following these supposed
keywords.

include/opcode:
2004-07-23 Jan Beulich <jbeulich@novell.com>

	* i386.h (sldx_Suf): Remove.
	(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
	(q_FP): Define, implying no REX64.
	(x_FP, sl_FP): Imply FloatMF.
	(i386_optab): Split reg and mem forms of moving from segment
registers
	so that the memory forms can ignore the 16-/32-bit operand size
	distinction. Adjust a few others for Intel mode. Remove *FP uses
from
	all non-floating-point instructions. Unite 32- and 64-bit forms
of
	movsx, movzx, and movd. Adjust floating point operations for the
above
	changes to the *FP macros. Add DefaultSize to floating point
controls
	insns operating on larger memory ranges.

opcodes:
2004-07-23 Jan Beulich <jbeulich@novell.com>

	* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
	(indirEb): Remove.
	(Mp): Use f_mode rather than none at all.
	(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define.
t_mode
	replaces what previously was x_mode; x_mode now means 128-bit
SSE
	operands.
	(dis386): Make far jumps and calls have an 'l' prefix only in
AT&T
	mode. movmskpX's, pextrw's, and pmovmskb's first operands are
Gdq.
	pinsrw's second operand is Edqw.
	(grps): 1-bit shifts' and rotates' second operands are I1.
cmpxchg8b's
	operand is Eq. movntq's and movntdq's first operands are EM.
s[gi]dt,
	fldenv, frstor, fsave, fstenv all should also have suffixes in
Intel
	mode when an operand size override is present or always
suffixing.
	More instructions will need to be added to this group.
	(putop): Handle new macro chars 'C' (short/long suffix
selector),
	'I' (Intel mode override for following macro char), and 'J'
(for
	adding the 'l' prefix to far branches in AT&T mode). When an
	alternative was specified in the template, honor macro character
when
	specified for Intel mode.
	(OP_E): Handle new *_mode values. Correct pointer specifications
for
	memory operands. Consolidate output of index register.
	(OP_G): Handle new *_mode values.
	(OP_I): Handle const_1_mode.
	(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
	respective opcode prefix bits have been consumed.
	(OP_EM, OP_EX): Provide some default handling for generating
pointer
	specifications.

Attachment: binutils-mainline-x86-intel-syntax.patch
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