Index: tc-ppc.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-ppc.c,v
retrieving revision 1.75
diff -r1.75 tc-ppc.c
95a96,98
> /* Set ppc_cpu based on a value. */
> static int ppc_set_cpu_value PARAMS ((char *));
> 
99a103
> static void ppc_set PARAMS ((int));
260a265
>   { "set",  	ppc_set,    	0 },
886,971c891,892
<       /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
< 	 (RIOS2).  */
<       if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
< 	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
<       /* -mpwr means to assemble for the IBM POWER (RIOS1).  */
<       else if (strcmp (arg, "pwr") == 0)
< 	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
<       /* -m601 means to assemble for the PowerPC 601, which includes
< 	 instructions that are holdovers from the Power.  */
<       else if (strcmp (arg, "601") == 0)
< 	ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
< 		   | PPC_OPCODE_601 | PPC_OPCODE_32);
<       /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
< 	 PowerPC 603/604.  */
<       else if (strcmp (arg, "ppc") == 0
< 	       || strcmp (arg, "ppc32") == 0
< 	       || strcmp (arg, "603") == 0
< 	       || strcmp (arg, "604") == 0)
< 	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
<       /* -m403 and -m405 mean to assemble for the PowerPC 403/405.  */
<       else if (strcmp (arg, "403") == 0
< 	       || strcmp (arg, "405") == 0)
< 	ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
< 		   | PPC_OPCODE_403 | PPC_OPCODE_32);
<       else if (strcmp (arg, "7400") == 0
< 	       || strcmp (arg, "7410") == 0
< 	       || strcmp (arg, "7450") == 0
< 	       || strcmp (arg, "7455") == 0)
< 	ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
< 		   | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
<       else if (strcmp (arg, "altivec") == 0)
< 	{
< 	  if (ppc_cpu == 0)
< 	    ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
< 	  else
< 	    ppc_cpu |= PPC_OPCODE_ALTIVEC;
< 	}
<       else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
< 	{
< 	  ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
< 		     | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
< 		     | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
< 		     | PPC_OPCODE_RFMCI);
< 	}
<       else if (strcmp (arg, "spe") == 0)
< 	{
< 	  if (ppc_cpu == 0)
< 	    ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
< 	  else
< 	    ppc_cpu |= PPC_OPCODE_SPE;
< 	}
<       /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
< 	 620.  */
<       else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
< 	{
< 	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
< 	}
<       else if (strcmp (arg, "ppc64bridge") == 0)
< 	{
< 	  ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
< 		     | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
< 	}
<       /* -mbooke/-mbooke32 mean enable 32-bit BookE support.  */
<       else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
< 	{
< 	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
< 	}
<       /* -mbooke64 means enable 64-bit BookE support.  */
<       else if (strcmp (arg, "booke64") == 0)
< 	{
< 	  ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
< 		     | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
< 	}
<       else if (strcmp (arg, "power4") == 0)
< 	{
< 	  ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
< 		     | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
< 	}
<       /* -mcom means assemble for the common intersection between Power
< 	 and PowerPC.  At present, we just allow the union, rather
< 	 than the intersection.  */
<       else if (strcmp (arg, "com") == 0)
< 	ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
<       /* -many means to assemble for any architecture (PWR/PWRX/PPC).  */
<       else if (strcmp (arg, "any") == 0)
< 	ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
---
>       if (ppc_set_cpu_value(arg))
> 	break;
1137a1059,1155
> /* Set ppc_cpu based on architecture name. */
> 
> static int
> ppc_set_cpu_value (arg)
>   char *arg;
> {
>   /* pwrx and pwr2 mean to assemble for the IBM POWER/2
>      (RIOS2).  */
>   if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
>     ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
>   /* pwr means to assemble for the IBM POWER (RIOS1).  */
>   else if (strcmp (arg, "pwr") == 0)
>     ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
>   /* 601 means to assemble for the PowerPC 601, which includes
>      instructions that are holdovers from the Power.  */
>   else if (strcmp (arg, "601") == 0)
>     ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
>                | PPC_OPCODE_601 | PPC_OPCODE_32);
>   /* ppc, ppc32, 603, and 604 mean to assemble for the
>      PowerPC 603/604.  */
>   else if (strcmp (arg, "ppc") == 0
>            || strcmp (arg, "ppc32") == 0
>            || strcmp (arg, "603") == 0
>            || strcmp (arg, "604") == 0)
>     ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
>   /* 403 and 405 mean to assemble for the PowerPC 403/405.  */
>   else if (strcmp (arg, "403") == 0
>            || strcmp (arg, "405") == 0)
>     ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
>                | PPC_OPCODE_403 | PPC_OPCODE_32);
>   else if (strcmp (arg, "7400") == 0
>            || strcmp (arg, "7410") == 0
>            || strcmp (arg, "7450") == 0
>            || strcmp (arg, "7455") == 0)
>     ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
>                | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
>   else if (strcmp (arg, "altivec") == 0)
>     {
>       if (ppc_cpu == 0)
>         ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
>       else
>         ppc_cpu |= PPC_OPCODE_ALTIVEC;
>     }
>   else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
>     {
>       ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
>                  | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
>                  | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
>                  | PPC_OPCODE_RFMCI);
>     }
>   else if (strcmp (arg, "spe") == 0)
>     {
>       if (ppc_cpu == 0)
>         ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
>       else
>         ppc_cpu |= PPC_OPCODE_SPE;
>     }
>   /* ppc64 and 620 mean to assemble for the 64-bit PowerPC
>      620.  */
>   else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
>     {
>       ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
>     }
>   else if (strcmp (arg, "ppc64bridge") == 0)
>     {
>       ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
>                  | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
>     }
>   /* booke/booke32 mean enable 32-bit BookE support.  */
>   else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
>     {
>       ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
>     }
>   /* booke64 means enable 64-bit BookE support.  */
>   else if (strcmp (arg, "booke64") == 0)
>     {
>       ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
>                  | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
>     }
>   else if (strcmp (arg, "power4") == 0)
>     {
>       ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
>                  | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
>     }
>   /* com means assemble for the common intersection between Power
>      and PowerPC.  At present, we just allow the union, rather
>      than the intersection.  */
>   else if (strcmp (arg, "com") == 0)
>     ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
>   /* any means to assemble for any architecture (PWR/PWRX/PPC).  */
>   else if (strcmp (arg, "any") == 0)
>     ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
>   else 
>     return FALSE;
>   return TRUE;
> }
> 
3968a3987,4008
> }
> 
> /*Pseudo-op .set.  */
> 
> static void
> ppc_set (ignore)
>      int ignore ATTRIBUTE_UNUSED;
> {
>   char *name = input_line_pointer, ch;
> 
>   while (!is_end_of_line[(unsigned char) *input_line_pointer])
>     input_line_pointer++;
>   ch = *input_line_pointer;
>   *input_line_pointer = '\0';
>    
>   if (!ppc_set_cpu_value(name)) {
>     as_bad (_("invalid assembly arg to pseudo opcode .set: %s"), name);
>     return;
>   }
> 
>   *input_line_pointer = ch;
>   demand_empty_rest_of_line ();