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[PATHC] Add machine type for Cirrus EP9312 chip
- From: Nick Clifton <nickc at redhat dot com>
- To: binutils at sources dot redhat dot com
- Date: 10 Feb 2003 10:45:04 +0000
- Subject: [PATHC] Add machine type for Cirrus EP9312 chip
Hi Guys,
I am applying the patch below to add support to mark ARM ELF
binaries as supporting the Cirrus EP9312 Maverick floating point
co-processor. This is to coincide with the contribution of GCC
support for this coprocessor.
The patch only adds support for ELF format binaries as there are not
spare flag bits left in the ARM COFF binaries. At some point in the
near future we will have to switch to having a special .note section
to contain this information.
Cheers
Nick
include/elf/ChangeLog
2003-02-10 Nick Clifton <nickc@redhat.com>
* arm.h (EF_ARM_MAVERICK_FLOAT): Define.
bfd/ChangeLog
2003-02-10 Nick Clifton <nickc@redhat.com>
* archures.c (bfd_mach_arm_ep9312): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (processors[]): Add ep9312.
(bfd_arm_arch): Add ep9312.
* elf32-arm.h (elf32_arm_merge_private_data): Update error
messages and add test for Maverick floating point support.
(elf32_arm_print_private_bfd_data): Handle
EF_ARM_MAVERICK_FLOAT flag.
gas/ChangeLog
2003-02-10 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (md_begin): If the Maverick co-processor is
selected, set the EF_ARM_MAVERICK_FLOAT flag and
bfd_mach_arm_ep9312 machine number.
binutils/ChangeLog
2003-02-10 Nick Clifton <nickc@redhat.com>
* readelf.c (decode_ARM_machine_flags): Handle the
EF_ARM_MAVERICK_FLOAT flag.
Index: include/elf/arm.h
===================================================================
RCS file: /cvs/src/src/include/elf/arm.h,v
retrieving revision 1.9
diff -c -3 -p -w -r1.9 arm.h
*** include/elf/arm.h 16 Jan 2002 11:35:17 -0000 1.9
--- include/elf/arm.h 10 Feb 2003 10:30:59 -0000
***************
*** 34,39 ****
--- 34,40 ----
#define EF_ARM_OLD_ABI 0x100
#define EF_ARM_SOFT_FLOAT 0x200
#define EF_ARM_VFP_FLOAT 0x400
+ #define EF_ARM_MAVERICK_FLOAT 0x800
/* Other constants defined in the ARM ELF spec. version B-01. */
#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.65
diff -c -3 -p -w -r1.65 archures.c
*** bfd/archures.c 23 Jan 2003 18:50:56 -0000 1.65
--- bfd/archures.c 10 Feb 2003 10:31:00 -0000
*************** DESCRIPTION
*** 234,239 ****
--- 234,240 ----
.#define bfd_mach_arm_5T 8
.#define bfd_mach_arm_5TE 9
.#define bfd_mach_arm_XScale 10
+ .#define bfd_mach_arm_ep9312 11
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
Index: bfd/cpu-arm.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-arm.c,v
retrieving revision 1.7
diff -c -3 -p -w -r1.7 cpu-arm.c
*** bfd/cpu-arm.c 30 Nov 2002 08:39:36 -0000 1.7
--- bfd/cpu-arm.c 10 Feb 2003 10:31:05 -0000
*************** processors[] =
*** 95,101 ****
{ bfd_mach_arm_4, "strongarm"},
{ bfd_mach_arm_4, "strongarm110" },
{ bfd_mach_arm_4, "strongarm1100" },
! { bfd_mach_arm_XScale, "xscale" }
};
static bfd_boolean
--- 95,102 ----
{ bfd_mach_arm_4, "strongarm"},
{ bfd_mach_arm_4, "strongarm110" },
{ bfd_mach_arm_4, "strongarm1100" },
! { bfd_mach_arm_XScale, "xscale" },
! { bfd_mach_arm_ep9312, "ep9312" }
};
static bfd_boolean
*************** static const bfd_arch_info_type arch_inf
*** 140,146 ****
N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
! N (bfd_mach_arm_XScale, "xscale", FALSE, NULL)
};
const bfd_arch_info_type bfd_arm_arch =
--- 141,148 ----
N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
! N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
! N (bfd_mach_arm_ep9312, "ep9312", FALSE, NULL)
};
const bfd_arch_info_type bfd_arm_arch =
Index: bfd/elf32-arm.h
===================================================================
RCS file: /cvs/src/src/bfd/elf32-arm.h,v
retrieving revision 1.100
diff -c -3 -p -w -r1.100 elf32-arm.h
*** bfd/elf32-arm.h 30 Nov 2002 08:39:37 -0000 1.100
--- bfd/elf32-arm.h 10 Feb 2003 10:31:10 -0000
*************** ERROR: %s passes floats in integer regis
*** 2310,2321 ****
{
if (in_flags & EF_ARM_VFP_FLOAT)
_bfd_error_handler (_("\
! ERROR: %s uses VFP instructions, whereas %s uses FPA instructions"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
else
_bfd_error_handler (_("\
! ERROR: %s uses FPA instructions, whereas %s uses VFP instructions"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
--- 2310,2337 ----
{
if (in_flags & EF_ARM_VFP_FLOAT)
_bfd_error_handler (_("\
! ERROR: %s uses VFP instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
else
_bfd_error_handler (_("\
! ERROR: %s uses FPA instructions, whereas %s does not"),
! bfd_archive_filename (ibfd),
! bfd_get_filename (obfd));
!
! flags_compatible = FALSE;
! }
!
! if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
! {
! if (in_flags & EF_ARM_MAVERICK_FLOAT)
! _bfd_error_handler (_("\
! ERROR: %s uses Maverick instructions, whereas %s does not"),
! bfd_archive_filename (ibfd),
! bfd_get_filename (obfd));
! else
! _bfd_error_handler (_("\
! ERROR: %s uses Maverick instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
*************** elf32_arm_print_private_bfd_data (abfd,
*** 2410,2415 ****
--- 2426,2433 ----
if (flags & EF_ARM_VFP_FLOAT)
fprintf (file, _(" [VFP float format]"));
+ else if (flags & EF_ARM_MAVERICK_FLOAT)
+ fprintf (file, _(" [Maverick float format]"));
else
fprintf (file, _(" [FPA float format]"));
*************** elf32_arm_print_private_bfd_data (abfd,
*** 2430,2436 ****
flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
| EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
! | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT);
break;
case EF_ARM_EABI_VER1:
--- 2448,2455 ----
flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
| EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
! | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
! | EF_ARM_MAVERICK_FLOAT);
break;
case EF_ARM_EABI_VER1:
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.136
diff -c -3 -p -w -r1.136 tc-arm.c
*** gas/config/tc-arm.c 23 Jan 2003 12:51:04 -0000 1.136
--- gas/config/tc-arm.c 10 Feb 2003 10:31:19 -0000
*************** md_begin ()
*** 9278,9283 ****
--- 9278,9290 ----
/* Using VFP conventions (even if soft-float). */
if (cpu_variant & FPU_VFP_EXT_NONE) flags |= F_VFP_FLOAT;
+ #if defined OBJ_ELF
+ if (cpu_variant & ARM_CEXT_MAVERICK)
+ {
+ flags ^= F_SOFT_FLOAT;
+ flags |= EF_ARM_MAVERICK_FLOAT;
+ }
+ #endif
bfd_set_private_flags (stdoutput, flags);
*************** md_begin ()
*** 9324,9329 ****
--- 9331,9338 ----
/* Catch special cases. */
if (cpu_variant & ARM_CEXT_XSCALE)
mach = bfd_mach_arm_XScale;
+ else if (cpu_variant & ARM_CEXT_MAVERICK)
+ mach = bfd_mach_arm_ep9312;
else if (cpu_variant & ARM_EXT_V5E)
mach = bfd_mach_arm_5TE;
else if (cpu_variant & ARM_EXT_V5)
Index: binutils/readelf.c
===================================================================
RCS file: /cvs/src/src/binutils/readelf.c,v
retrieving revision 1.193
diff -c -3 -p -w -r1.193 readelf.c
*** binutils/readelf.c 28 Jan 2003 12:51:07 -0000 1.193
--- binutils/readelf.c 10 Feb 2003 10:31:28 -0000
*************** decode_ARM_machine_flags (e_flags, buf)
*** 1873,1878 ****
--- 1873,1882 ----
strcat (buf, ", software FP");
break;
+ case EF_ARM_MAVERICK_FLOAT:
+ strcat (buf, ", Maverick FP");
+ break;
+
default:
unknown = 1;
break;