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[RFA]: opcodes alpha disassembler
- To: binutils at sourceware dot cygnus dot com, gdb-patches at sourceware dot cygnus dot com
- Subject: [RFA]: opcodes alpha disassembler
- From: Michael Snyder <msnyder at cygnus dot com>
- Date: Thu, 20 Jul 2000 18:43:42 -0700 (PDT)
Would the following be acceptable, with a suitable ChangeLog?
Index: alpha-opc.c
===================================================================
RCS file: /cvs/cvsfiles/devo/opcodes/alpha-opc.c,v
retrieving revision 1.13
diff -p -r1.13 alpha-opc.c
*** alpha-opc.c 2000/04/28 13:38:26 1.13
--- alpha-opc.c 2000/07/21 01:42:46
***************
*** 26,53 ****
#include "bfd.h"
#include "opintl.h"
! /* This file holds the Alpha AXP opcode table. The opcode table includes
! almost all of the extended instruction mnemonics. This permits the
! disassembler to use them, and simplifies the assembler logic, at the
! cost of increasing the table size. The table is strictly constant
! data, so the compiler should be able to put it in the .text section.
- This file also holds the operand table. All knowledge about inserting
- operands into instructions and vice-versa is kept in this file.
-
The information for the base instruction set was compiled from the
_Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE,
version 2.
! The information for the post-ev5 architecture extensions BWX, CIX and
! MAX came from version 3 of this same document, which is also available
! on-line at http://ftp.digital.com/pub/Digital/info/semiconductor
! /literature/alphahb2.pdf
The information for the EV4 PALcode instructions was compiled from
! _DECchip 21064 and DECchip 21064A Alpha AXP Microprocessors Hardware
! Reference Manual_, Digital Order Number EC-Q9ZUA-TE, preliminary
! revision dated June 1994.
The information for the EV5 PALcode instructions was compiled from
_Alpha 21164 Microprocessor Hardware Reference Manual_, Digital
--- 26,56 ----
#include "bfd.h"
#include "opintl.h"
! /* This file holds the Alpha AXP opcode table. The opcode table
! includes almost all of the extended instruction mnemonics. This
! permits the disassembler to use them, and simplifies the assembler
! logic, at the cost of increasing the table size. The table is
! strictly constant data, so the compiler should be able to put it in
! the .text section.
!
! This file also holds the operand table. All knowledge about
! inserting operands into instructions and vice-versa is kept in this
! file.
The information for the base instruction set was compiled from the
_Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE,
version 2.
! The information for the post-ev5 architecture extensions BWX, CIX
! and MAX, and for the Digital UNIX PALcode calls, came from version
! 4 of this same document, which is also available on-line at
! http://ftp.digital.com/pub/Digital/info/semiconductor/literature/
! alphaahb.pdf
The information for the EV4 PALcode instructions was compiled from
! _DECchip 21064 and DECchip 21064A Alpha AXP Microprocessors
! Hardware Reference Manual_, Digital Order Number EC-Q9ZUA-TE,
! preliminary revision dated June 1994.
The information for the EV5 PALcode instructions was compiled from
_Alpha 21164 Microprocessor Hardware Reference Manual_, Digital
*************** extract_ev6hwjhint(insn, invalid)
*** 531,541 ****
--- 534,573 ----
const struct alpha_opcode alpha_opcodes[] = {
{ "halt", SPCD(0x00,0x0000), BASE, ARG_NONE },
+ { "cflush", SPCD(0x00,0x0001), BASE, ARG_NONE },
{ "draina", SPCD(0x00,0x0002), BASE, ARG_NONE },
+ { "cserve", SPCD(0x00,0x0009), BASE, ARG_NONE },
+ { "swppal", SPCD(0x00,0x000A), BASE, ARG_NONE },
+ { "wripir", SPCD(0x00,0x000D), BASE, ARG_NONE },
+ { "rdmces", SPCD(0x00,0x0010), BASE, ARG_NONE },
+ { "wrmces", SPCD(0x00,0x0011), BASE, ARG_NONE },
+ { "wrfen", SPCD(0x00,0x002B), BASE, ARG_NONE },
+ { "wrvptptr", SPCD(0x00,0x002D), BASE, ARG_NONE },
+ { "swpctx", SPCD(0x00,0x0030), BASE, ARG_NONE },
+ { "wrval", SPCD(0x00,0x0031), BASE, ARG_NONE },
+ { "rdval", SPCD(0x00,0x0032), BASE, ARG_NONE },
+ { "tbi", SPCD(0x00,0x0033), BASE, ARG_NONE },
+ { "wrent", SPCD(0x00,0x0034), BASE, ARG_NONE },
+ { "swpipl", SPCD(0x00,0x0035), BASE, ARG_NONE },
+ { "rdps", SPCD(0x00,0x0036), BASE, ARG_NONE },
+ { "wrkgp", SPCD(0x00,0x0037), BASE, ARG_NONE },
+ { "wrusp", SPCD(0x00,0x0038), BASE, ARG_NONE },
+ { "wrperfmon", SPCD(0x00,0x0039), BASE, ARG_NONE },
+ { "rdusp", SPCD(0x00,0x003A), BASE, ARG_NONE },
+ { "whami", SPCD(0x00,0x003C), BASE, ARG_NONE },
+ { "retsys", SPCD(0x00,0x003D), BASE, ARG_NONE },
+ { "wtint", SPCD(0x00,0x003E), BASE, ARG_NONE },
+ { "rti", SPCD(0x00,0x003F), BASE, ARG_NONE },
{ "bpt", SPCD(0x00,0x0080), BASE, ARG_NONE },
+ { "bugchk", SPCD(0x00,0x0081), BASE, ARG_NONE },
{ "callsys", SPCD(0x00,0x0083), BASE, ARG_NONE },
{ "chmk", SPCD(0x00,0x0083), BASE, ARG_NONE },
{ "imb", SPCD(0x00,0x0086), BASE, ARG_NONE },
+ { "urti", SPCD(0x00,0x0092), BASE, ARG_NONE },
+ { "rdunique", SPCD(0x00,0x009E), BASE, ARG_NONE },
+ { "wrunique", SPCD(0x00,0x009F), BASE, ARG_NONE },
+ { "gentrap", SPCD(0x00,0x00AA), BASE, ARG_NONE },
+ { "clrfen", SPCD(0x00,0x00AE), BASE, ARG_NONE },
{ "call_pal", PCD(0x00), BASE, ARG_PCD },
{ "pal", PCD(0x00), BASE, ARG_PCD }, /* alias */